Akash Levy
9df378f8ac
opt_carry_select pass
2026-06-18 02:36:29 -07:00
Akash Levy
23b021a26b
Fix opt_compact_prefix wide packs and opt_priority_onehot max-width test
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The tests/silimate suite (which aborted the Run tests CI job) exposed two
issues in the generalized passes:
- opt_compact_prefix: the forward dense pack regressions at 64 and 128 bits
no longer rewrote. The ConstEval fingerprint was uint64_t-based (capped at
62 bits) and the per-cone cell cap (max_width*96) was below the O(width^2)
cell count of a wide pack. The fingerprint now drives whole-width Const
bit patterns (no width cap) and the cone cap scales quadratically; total
work stays bounded by the shared walk/eval budgets.
- opt_priority_onehot: the "max-width below lane count" negative test set
max_width=8 on a 16-lane design expecting no rewrite, but the generalized
matcher legitimately (and equivalence-provably) rewrites the 8-lane
sub-region. The test now uses max_width=3 (below min_width 4) to verify
the width gate suppresses all matching.
Co-authored-by: Cursor <cursoragent@cursor.com>
2026-06-15 12:02:09 -07:00
Akash Levy
3743c4795a
opt_priority_onehot
2026-06-09 22:18:20 -07:00
Akash Levy
faea2d904a
Make opt_compact_prefix match more
2026-06-09 10:55:10 -07:00
Akash Levy
b60d2daa41
Merge pull request #183 from Silimate/opt_argmax_fix1
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opt_argmax fixes
2026-06-09 02:54:05 -07:00
Akash Levy
4a35c0ab87
opt_argmax fixes
2026-06-09 01:57:11 -07:00
Akash Levy
30c510041a
Fix opt_compact_prefix up
2026-06-09 00:34:13 -07:00
Akash Levy
b3ea5770cd
opt_argmax pass
2026-06-02 04:11:17 -07:00
Akash Levy
c7b2c16405
Merge pull request #179 from Silimate/opt_compact_prefix
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Add opt_compact_prefix pass
2026-06-02 02:14:37 -07:00
Akash Levy
a730032f5f
Add opt_compact_prefix pass
2026-06-01 23:00:33 -07:00
Akash Levy
0c3446e8af
Fixups for Greptile
2026-06-01 19:03:52 -07:00
Akash Levy
9cc69a3c49
Improvement to opt_balance_tree
2026-06-01 17:56:44 -07:00
Akash Levy
14efbe3ee6
Smallfix
2026-05-27 04:36:45 -07:00
Akash Levy
6a8d800e63
Fixes for filtering small cases and catching more larger ones with trickier signatures
2026-05-27 03:40:44 -07:00
Akash Levy
5c3fbd2d63
Merge branch 'main' into opt_addcin
2026-05-27 01:52:11 -07:00
Akash Levy
89717069fe
Fixup
2026-05-27 01:51:54 -07:00
Akash Levy
d3c5591647
Merge pull request #171 from Silimate/infer_icg
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infer_icg pass
2026-05-27 01:06:40 -07:00
Akash Levy
7ea578a212
Merge pull request #170 from Silimate/ffnormpol
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ffnormpol pass
2026-05-27 01:05:05 -07:00
Akash Levy
e39395132d
opt_addcin pass
2026-05-27 00:39:25 -07:00
Akash Levy
2bb10837d9
infer_icg pass
2026-05-27 00:14:51 -07:00
Akash Levy
9e73dd6d27
ffnormpol pass
2026-05-27 00:13:05 -07:00
Akash Levy
42d257e523
opt_andor_pmux pass
2026-05-27 00:11:54 -07:00
Akash Levy
2ba8a5cac6
opt parallel prefix and priority encoders
2026-05-20 12:14:50 -07:00
Akash Levy
b4e94d9f13
modshr onehot pass
2026-05-20 01:25:28 -07:00
Akash Levy
4b219f0ef6
Improvements
2026-05-01 22:50:43 -07:00
Akash Levy
7db8f29c04
opt_boundary
2026-05-01 19:57:00 -07:00
Akash Levy
099a3c881b
Merge pull request #150 from Silimate/reenable_vhdl
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Reenable VHDL
2026-04-22 04:10:29 -07:00
Akash Levy
bf40364bd0
No operator optimization, but it passes all tests
2026-04-22 03:12:26 -07:00
Akash Levy
8485d57841
opt_expr for constant comparisons
2026-04-20 02:03:35 -07:00
Akash Levy
083eb8e5f1
Try again
2026-04-16 04:16:55 -07:00
Akash Levy
0db45a6796
Reenable VHDL
2026-04-16 04:03:31 -07:00
AdvaySingh1
54bcc49987
ENG-1872
2026-04-10 12:54:43 -07:00
Akash Levy
300c64773b
Fix offset in splitcells
2026-04-09 16:20:26 -07:00
Akash Levy
bf3afc569a
Fix the test
2026-04-07 22:46:33 -07:00
Akash Levy
6daa8a01ed
opt_vps improvements for VPS read
2026-04-07 22:07:14 -07:00
Akash Levy
1820526a9a
opt_vps
2026-04-03 01:15:17 -07:00
Akash Levy
5082625d71
opt_shift
2026-04-02 00:43:06 -07:00
Abhinav Tondapu
df43a3097a
[ENG-1692] negopt runtime fix + small cleanup
2026-03-30 16:30:46 -07:00
AdvaySingh1
f84fd46a17
Added test cases for clkmerge and cone_partition passes
2026-03-25 15:06:58 -07:00
AdvaySingh1
2836cc8f25
Added test cases for the infer_ce pass
2026-03-04 12:03:38 -08:00
tondapusili
f46b8d2a44
silimate: add opt_timing_balance pass and tests
2026-02-27 09:13:39 -08:00
Akash Levy
3e9a5c68b1
Switch back to main Verific without VHDL support
2026-02-18 21:57:14 -08:00
Akash Levy
650c636d39
Fixups
2026-02-18 01:12:35 -08:00
Akash Levy
33c2c88fa4
Bump Yosys to latest from upstream
2026-02-17 23:41:39 -08:00
Miodrag Milanović
ac96f318ef
Merge pull request #5676 from YosysHQ/emil/unit-test-by-default
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Run unit tests on make test
2026-02-13 15:02:50 +01:00
Akash Levy
2b247d165b
Merge from main
2026-02-13 04:14:08 -08:00
Miodrag Milanović
e4b32d6aae
Merge pull request #5670 from max-kudinov/gowin_mult
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Gowin: Add DSP inference for GW1N and GW2A
2026-02-12 14:30:27 +01:00
Miodrag Milanovic
cc79c6a761
Support building out of tree, but keep always in tests/unit
2026-02-12 12:17:07 +01:00
Maxim Kudinov
b055ea05fd
gowin: dsp: Add mult inference tests
2026-02-12 14:12:32 +03:00
Gus Smith
7a0774c3bb
Don't dump params by default
2026-02-11 08:33:39 -08:00