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No operator optimization, but it passes all tests

This commit is contained in:
Akash Levy 2026-04-22 03:12:26 -07:00
parent 0ee2277d4f
commit bf40364bd0
5 changed files with 25 additions and 8 deletions

View file

@ -92,7 +92,7 @@ generate_tests() {
if [[ $do_sv = true ]]; then
for x in *.sv; do
if [ ! -f "${x%.sv}.ys" ]; then
generate_ys_test "$x" "-p \"prep -top top; async2sync; select top; sat -enable_undef -verify -prove-asserts\" $yosys_args"
generate_ys_test "$x" "-p \"prep -top top; async2sync; sat -enable_undef -verify -prove-asserts\" $yosys_args"
fi;
done
fi;

View file

@ -2,8 +2,6 @@
## Disabled
<!-- - `import_warning_operator`: no VHDL -->
<!-- - `mixed_flist`: no VHDL -->
- `memory_semantics`: relies on initial values being retained, which we do not want
- `rom_case`: we need different behavior for multi-port memories
- `blackbox*`: we need different behavior for parametrized blackboxes