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  • 5293bc9164
    Merge ed263d26cc into 9d0cdb8551 Catherine 2026-05-23 11:28:49 -04:00
  • ed263d26cc Fix Windows portability issues that break MSVC build. cat/cmake Catherine 2026-05-23 03:58:12 +00:00
  • c2b7ed69d7
    Merge 9fcb15213e into 9d0cdb8551 nataliakokoromyti 2026-05-23 13:09:47 +08:00
  • 12a0365fe9
    Merge 39ff623ff7 into 9d0cdb8551 Emil J 2026-05-23 13:08:33 +08:00
  • 57eac85347
    Merge 2ed89e02da into 9d0cdb8551 Dhaval 2026-05-23 13:07:47 +08:00
  • 24605bfbae
    Merge 829a2f174a into 9d0cdb8551 Dhaval 2026-05-23 13:07:43 +08:00
  • 60dbf3d741
    Merge e0ce4b42f6 into 9d0cdb8551 Dhaval 2026-05-23 13:07:39 +08:00
  • beee976be1
    Merge 9f908d6749 into 9d0cdb8551 Dhaval 2026-05-23 13:07:33 +08:00
  • c3443efcde
    Merge cf6d89b6ad into 9d0cdb8551 Dhaval 2026-05-23 13:07:23 +08:00
  • 7a05c1e8e1
    Merge 42c9b9ef68 into 9d0cdb8551 Dhaval 2026-05-23 13:06:57 +08:00
  • 477cfa3582
    Merge 824d03368e into 9d0cdb8551 Yan 2026-05-23 13:06:33 +08:00
  • cf757b6750
    Merge 99e05506a0 into 9d0cdb8551 nataliakokoromyti 2026-05-23 13:05:57 +08:00
  • cf69ffb534
    Merge 6d62199805 into 9d0cdb8551 nataliakokoromyti 2026-05-23 13:05:52 +08:00
  • f66dd3841a
    Merge 2eb1051cca into 9d0cdb8551 nataliakokoromyti 2026-05-23 13:05:42 +08:00
  • 194f2850af
    Merge 64e4624d5c into 9d0cdb8551 nataliakokoromyti 2026-05-23 13:05:23 +08:00
  • 0b263d0d38
    Merge c59a2b047d into 9d0cdb8551 xiota 2026-05-23 12:59:38 +08:00
  • 40b58669f8
    Merge 62b29b0b75 into 9d0cdb8551 trayres 2026-05-23 12:36:01 +08:00
  • b5763f638a
    Merge 913ac04764 into 9d0cdb8551 KrystalDelusion 2026-05-23 12:25:26 +08:00
  • 0eebb9a7b8
    Merge 260cc42c2f into 9d0cdb8551 KrystalDelusion 2026-05-23 11:55:28 +08:00
  • b206c16347 Update CI scripts for CMake Miodrag Milanovic 2026-05-22 12:31:30 +02:00
  • 9b087b4aa7 Migrate build system to CMake Catherine 2026-05-12 05:33:04 +00:00
  • ec42748e66
    Merge 51a377be44 into 9d0cdb8551 Zachary Snow 2026-05-23 11:42:48 +08:00
  • 5d1dbb3f2c
    Merge aa86e6355e into 9d0cdb8551 Adrian Parvin D. Ouano 2026-05-23 11:31:20 +08:00
  • d0630d45c0
    Merge fac71a215c into 9d0cdb8551 Aki-nyan 2026-05-23 11:02:15 +08:00
  • 7a86c468e5
    Merge c96e19bd43 into 9d0cdb8551 Lofty 2026-05-23 10:53:30 +08:00
  • 58f1f72358
    Merge 2a3804139f into 9d0cdb8551 Matt Johnston 2026-05-23 10:43:14 +08:00
  • 0f52f45499
    Merge d3a79afce2 into 9d0cdb8551 Claire Xen 2026-05-23 10:41:20 +08:00
  • 9e1bc98370
    Merge 349fc479cb into 9d0cdb8551 Atl 2026-05-23 10:03:32 +08:00
  • 5bf7ecc151
    Merge 5a6568edbe into 849526491a Emil J 2026-05-22 23:13:20 +00:00
  • 5a6568edbe rtlil, patch: update signorm index and driver fields when committing Cell from Patch to Design emil/patcher Emil J. Tywoniak 2026-05-23 01:09:26 +02:00
  • b0eb50be1b fixup! patch: working multi-cell signorm invariant Emil J. Tywoniak 2026-05-23 00:11:16 +02:00
  • 9f22b9d2a0 patch: source transfer Emil J. Tywoniak 2026-05-19 19:31:16 +02:00
  • db1c1d4359 patch: working multi-cell signorm invariant Emil J. Tywoniak 2026-05-19 18:48:43 +02:00
  • e78e19acfe patch: fix patch mixins Emil J. Tywoniak 2026-05-19 16:21:00 +02:00
  • 8c26ecd2a6 patch: WIP multicell patch test Emil J. Tywoniak 2026-05-19 15:57:10 +02:00
  • 6b16a0cac8 patch: wires Emil J. Tywoniak 2026-05-19 15:33:41 +02:00
  • d2ae9b48e4 patch: signorm, move Emil J. Tywoniak 2026-05-19 12:36:41 +02:00
  • b7ea32dbee patch: unique heap Emil J. Tywoniak 2026-05-14 17:43:46 +02:00
  • dbc7e33908 rtlil: add CellAdderMixin for shared Cell adder interface between Module and Patch Emil J. Tywoniak 2026-01-01 17:06:38 +01:00
  • 770d74cc9b patch: GC comment Emil J. Tywoniak 2025-12-31 17:59:24 +01:00
  • 89e5c4ccca test_patch total basics Emil J. Tywoniak 2025-12-31 17:46:27 +01:00
  • 6f0be1b4e9 rtlil: allow friends to use Wire constructors with a factory token pattern Emil J. Tywoniak 2025-12-23 16:58:16 +01:00
  • 3e6b740430 rtlil: allow friends to use Cell constructors with a factory token pattern Emil J. Tywoniak 2025-12-21 16:56:14 +01:00
  • b3f605e0d2 patcher: start Emil J. Tywoniak 2025-12-19 19:14:33 +01:00
  • 25344b3947 Revert "tests: use memory -bram-register in tests/bram" Emil J. Tywoniak 2026-04-16 15:50:05 +02:00
  • 56461158b4 tests: use memory -bram-register in tests/bram Emil J. Tywoniak 2026-03-31 15:00:26 +02:00
  • 5d8bda78e1
    Merge 849526491a into 9d0cdb8551 Emil J 2026-05-22 19:23:45 +00:00
  • 849526491a fixup! tests: signorm fix emil/signorm Emil J. Tywoniak 2026-05-22 21:23:38 +02:00
  • 54b35be609 tests: signorm fix Emil J. Tywoniak 2026-05-22 21:20:32 +02:00
  • 6039446e60 Visual Studio build micko/cmake-ci Miodrag Milanovic 2026-05-22 19:54:19 +02:00
  • 72b60b6cef signorm: safer indexing if broken invariant Emil J. Tywoniak 2026-05-22 17:21:40 +02:00
  • dcc68e49fb check: check bufnorm too Emil J. Tywoniak 2026-05-22 13:11:24 +02:00
  • 4bff2e6340 check: check signorm indices and wires Emil J. Tywoniak 2026-05-22 13:04:37 +02:00
  • b9eae3f64b rtlil: publish signorm fanout Emil J. Tywoniak 2026-05-22 13:04:12 +02:00
  • 8f62d5c657 opt_merge: newcelltypes Emil J. Tywoniak 2026-05-06 13:52:25 +02:00
  • 7d335ed0d9 opt_merge: factor out hashing code across incremental and parallel Emil J. Tywoniak 2026-05-06 12:58:32 +02:00
  • 9abee44602 opt_expr: replace invert_map with signorm traversal Emil J. Tywoniak 2026-05-06 12:15:31 +02:00
  • 5dce475325 signorm: add timers Emil J. Tywoniak 2026-05-06 12:14:48 +02:00
  • 5de8452b57 rtlil_bufnorm: fix setup_driven_wires constant handling on unknown port direction Emil J. Tywoniak 2026-04-21 15:20:26 +02:00
  • 350385f5a2 check: fix memory bug in $connect Emil J. Tywoniak 2026-04-17 11:54:39 +02:00
  • 1dc7a69d7f memory_bram: create blackboxes Emil J. Tywoniak 2026-04-16 16:58:48 +02:00
  • 19a4c29a0e Revert "intel: register bram celltypes" Emil J. Tywoniak 2026-04-16 15:50:06 +02:00
  • 24d0bf19bc Revert "tests: use memory -bram-register in tests/bram" Emil J. Tywoniak 2026-04-16 15:50:05 +02:00
  • 8c4ab49955 Revert "memory: add -bram-register" Emil J. Tywoniak 2026-04-16 15:50:03 +02:00
  • c64be26334 Revert "memory_bram: add -register" Emil J. Tywoniak 2026-04-16 15:50:01 +02:00
  • 116931861d intel_alm: loosen tests Emil J. Tywoniak 2026-04-16 11:57:53 +02:00
  • de481b04b8 gowin: loosen tests Emil J. Tywoniak 2026-04-16 11:56:35 +02:00
  • 09f55abf1a flatten: disable signorm Emil J. Tywoniak 2026-04-15 17:31:37 +02:00
  • bb19205c79 ecp5: loosen tests Emil J. Tywoniak 2026-04-15 12:01:00 +02:00
  • 87931fbf7d nexus: loosen tests Emil J. Tywoniak 2026-04-15 12:00:49 +02:00
  • 41b3dbbc28 xilinx_dsp: signorm compatibility Emil J. Tywoniak 2026-04-15 11:37:16 +02:00
  • 6fd7f5c02d pmgen: hold sigmap pointer instead of owning it Emil J. Tywoniak 2026-04-14 18:05:33 +02:00
  • 394be03d57 equiv_miter: don't copy $input_port Emil J. Tywoniak 2026-04-09 13:18:16 +02:00
  • e73b828e07 rtlil_bufnorm: more xlog Emil J. Tywoniak 2026-04-09 13:17:49 +02:00
  • 451e01d0a4 design: properly switch signorm mode when restoring saved designs Emil J. Tywoniak 2026-04-09 13:16:37 +02:00
  • 38fab51fc1 equiv_make: don't copy $input_port Emil J. Tywoniak 2026-04-08 11:40:19 +02:00
  • 7905df89f3 rtlil: fix cloneInto in signorm Emil J. Tywoniak 2026-04-08 11:39:24 +02:00
  • 754709aa01 rtlil: sigNormalize Module when added to Design in signorm mode Emil J. Tywoniak 2026-04-07 20:05:51 +02:00
  • 5355a1739e rtlil_bufnorm: more xlog Emil J. Tywoniak 2026-04-07 19:30:19 +02:00
  • 9717a558cc intel: register bram celltypes Emil J. Tywoniak 2026-04-02 17:01:32 +02:00
  • d7b6f1c095 rtlil_bufnorm: ignore timing info harder Emil J. Tywoniak 2026-04-02 17:01:09 +02:00
  • 14eaedace4 gowin: replace positional arguments in cells_sim.v with named Emil J. Tywoniak 2026-04-02 13:00:02 +02:00
  • a93faf811a Revert "techmap: call hierarchy on map files to determine port directions" Emil J. Tywoniak 2026-04-02 11:40:33 +02:00
  • 81b99d83f5 hierarchy: tolerance for apparent recursive instances in techmap files Emil J. Tywoniak 2026-04-01 13:12:41 +02:00
  • 0eb215dd97 techmap: call hierarchy on map files to determine port directions Emil J. Tywoniak 2026-04-01 12:46:31 +02:00
  • b7c9c8eea6 tests: use memory -bram-register in tests/bram Emil J. Tywoniak 2026-03-31 15:00:26 +02:00
  • 67de0c8c9e memory: add -bram-register Emil J. Tywoniak 2026-03-31 14:59:59 +02:00
  • 88aa5f190b memory_bram: add -register Emil J. Tywoniak 2026-03-31 14:59:10 +02:00
  • 5e313a19a0 ffmerge: initvals signorm compatibility fixup Emil J. Tywoniak 2026-03-26 23:53:53 +01:00
  • eb6dd47bd6 timinginfo: special-case $specify2 in signorm invariant Emil J. Tywoniak 2026-03-26 19:42:33 +01:00
  • 5bfb631085 opt_expr: with -keepdc disable equality optimization rules that break when ports are sigmapped Emil J. Tywoniak 2026-03-25 11:50:17 +01:00
  • bd8738de15 connect: remove input ports on conflict Emil J. Tywoniak 2026-03-24 22:39:45 +01:00
  • aecc173f83 opt_dff: sigma harder, FfDataSigMapped Emil J. Tywoniak 2026-03-24 11:32:42 +01:00
  • 7382be6962 ff: add FfDataSigMapped Emil J. Tywoniak 2026-03-24 11:32:29 +01:00
  • be7beaf91a opt_dff: temporarily disable signorm due to muxtree traversal Emil J. Tywoniak 2026-03-18 12:56:52 +01:00
  • 95eae1aa6d tests: fix rtlil roundtrip test Emil J. Tywoniak 2026-03-18 00:48:03 +01:00
  • 21bed1a411 design: fix signorm commit connectivity to design Emil J. Tywoniak 2026-03-18 00:44:20 +01:00
  • 6c2a90affc cxxrtl: ignore $input_port Emil J. Tywoniak 2026-03-17 18:06:07 +01:00
  • faa1a1065c flatten: redo signormalization to work around fanout issue Emil J. Tywoniak 2026-03-17 18:04:41 +01:00
  • bd437f207f abstract: fix test signorm Emil J. Tywoniak 2026-03-17 17:39:05 +01:00