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63b3ce0c77 · Merge pull request #4971 from Anhijkt/pow-optimization · Updated 2025-04-03 12:34:36 +00:00

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eb5abf9c12 · test_cell: Add $bweqx, kinda · Updated 2025-03-31 03:39:13 +00:00

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80dc946499 · Makefile: Test yosys git status in check-git-abc · Updated 2025-03-28 23:29:55 +00:00

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f2d7833b2b · test-compile: gcc-14 as newest · Updated 2025-03-27 21:31:06 +00:00

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aa4d59cdcb · Trigger abc segfault for testing · Updated 2025-03-26 11:20:57 +00:00

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b429fba5ac · Docs: How to use bugpoint paragraphs · Updated 2025-03-25 04:06:05 +00:00

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0a1c664f02 · simplify: Skip AST_PRIMITIVE in AST_CELLARRAY · Updated 2025-03-24 23:15:54 +00:00

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7d7c32d056 · Makefile: Fix chformal.cc copy · Updated 2025-03-20 21:41:29 +00:00

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89c037b349 · opt_expr: Avoid visitor lambda · Updated 2025-03-20 20:52:57 +00:00

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95be73467d · opt_expr: chop up the kitchen sink · Updated 2025-03-20 14:58:39 +00:00

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0a15a23e8f · opt_expr: neater variable names, avoid shadowing · Updated 2025-03-20 11:31:59 +00:00

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1646bcd474 · WIP · Updated 2025-03-19 17:19:07 +00:00

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8405b3b723 · select: Fix -none and -clear · Updated 2025-03-14 03:32:18 +00:00

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2e31dd3070 · quicklogic: add fracturable full-block dspv1 to keep vendor simulation model unchanged · Updated 2025-03-10 16:12:31 +00:00

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913ac04764 · hierarchy: Derive abstract cells in top mod · Updated 2025-03-06 21:12:29 +00:00

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5eb46f95c2 · equiv_induct: change missing SAT model warning to error · Updated 2025-03-06 17:15:52 +00:00

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caf921161c · quicklogic: ql_dsp_io_regs debug print · Updated 2025-03-06 17:01:28 +00:00

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e6d7c033e5 · ql_dsp_macc: whitespace. NFC · Updated 2025-02-27 16:37:18 +00:00    mirrors

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d2040a9506 · synth_quicklogic: enable dspv2 tests, fix -dspv2 · Updated 2025-02-25 10:59:41 +00:00    mirrors

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c87bf56efb · CMake: more generated files · Updated 2025-02-14 10:12:33 +00:00    mirrors

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43b5e109f3 · formalff: Document -declockgate option · Updated 2025-02-12 16:45:02 +00:00    mirrors

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