A port's direction is read off the cell type, so assigning
type_impl = $lut while the $__ICE40_CARRY_WRAPPER ports are still
connected makes every following unsetPort consult the wrong type: \B was
an input under the wrapper and is not a port of $lut at all, so the
teardown takes the output branch and trips
`log_assert(w->driverCell_ == this)` in signorm mode (arch/ice40/counter,
arch/ice40/bug1598).
Disconnect everything under the old type, switch, then connect \A and \Y
under the new one. Retiring \O first also leaves that wire undriven, so
it comes back as \Y on the same wire rather than behind a freshly
interposed alias.
Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_01MQU5XCqDYY8MbivGkNRrDo
kernel/compressor_tree.cc, passes/tests/test_kogge_stone.cc,
passes/opt/peepopt_shiftpow2.pmg, and techlibs/lattice/lattice_dsp_nexus.pmg
(plus the 5 new constids it needs: A0, B0, PIPELINED, SIGNED, SUBTRACT)
were all added to main after the emil/twines-proc-srcloc fork point, so no
commit in this phase's range ever touches them. They still use the old
IdString-based addWire/addCell/setPort/getParam APIs (NEW_ID, plain \X
port names) that the twine migration replaces, so they fail to build
against current HEAD. Not attributable to any single commit in this
phase per task.md's carve-out for genuinely phase-spanning fixes -
bundled here as its own commit rather than folded into an unrelated
pick.
- with PCF support in nextpnr fabulous, `-iopad` is now the default
- supply further mapping using `-extra-plib`
Signed-off-by: Leo Moser <leomoser99@gmail.com>
- this allows to map to any memories
- to map legacy register files, use: `-extra-plib regfile.v -extra-mlibmap ram_regfile.txt -extra-map regfile_map.v`
Signed-off-by: Leo Moser <leomoser99@gmail.com>
The concept of 'COMPLEX_DFF' is deprecated. Instead, simply specify the supported flip-flops using `-ff <cell_type_pattern> <init_values>` and supply the mapping file.
Signed-off-by: Leo Moser <leomoser99@gmail.com>
