Emil J. Tywoniak 1b19859e84 intel: register bram celltypes		2026-07-17 23:33:02 +02:00
..
achronix
analogdevices
anlogic
common
coolrunner2
easic
efinix
fabulous	Remove old techmap.	2026-07-08 12:07:58 +02:00
gatemate
gowin	gowin: replace positional arguments in cells_sim.v with named	2026-07-17 23:33:02 +02:00
greenpak4
ice40	signorm: disable in passes that use swap_names	2026-07-17 23:32:34 +02:00
intel	intel: register bram celltypes	2026-07-17 23:33:02 +02:00
intel_alm	intel: register bram celltypes	2026-07-17 23:33:02 +02:00
lattice
microchip
nanoxplore
quicklogic	signorm: disable in passes that use swap_names	2026-07-17 23:32:34 +02:00
sf2
xilinx	signorm: disable in passes that use swap_names	2026-07-17 23:32:34 +02:00
CMakeLists.txt
fix_mod.py