Jacob Lifshay
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b63676d0ca
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add test for cfgs
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2024-12-28 23:39:50 -08:00 |
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Jacob Lifshay
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7005fa3330
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implement handling #[cfg] and #[cfg_attr] in proc macro inputs
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2024-12-28 23:39:08 -08:00 |
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Jacob Lifshay
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2ab8428062
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upgrade syn version
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2024-12-28 23:39:08 -08:00 |
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Jacob Lifshay
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9b06019bf5
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make sim::Compiler not print things to stdout unless you ask for it
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2024-12-18 21:15:09 -08:00 |
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Jacob Lifshay
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36bad52978
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sim: fix sim.write to struct
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2024-12-18 20:50:50 -08:00 |
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Jacob Lifshay
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21c73051ec
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sim: add SimValue and reading/writing more than just a scalar
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2024-12-18 01:39:35 -08:00 |
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Jacob Lifshay
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304d8da0e8
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Merge remote-tracking branch 'origin/master' into adding-simulator
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2024-12-13 15:06:45 -08:00 |
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Jacob Lifshay
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2af38de900
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add more memory tests
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2024-12-13 15:04:48 -08:00 |
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Jacob Lifshay
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c756aeec70
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tests/sim: add test for memory rw port
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2024-12-12 20:50:41 -08:00 |
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Jacob Lifshay
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903ca1bf30
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sim: simple memory test works!
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2024-12-12 19:47:57 -08:00 |
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Jacob Lifshay
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8d030ac65d
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sim/interpreter: add addresses to instruction listing
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2024-12-12 16:25:38 -08:00 |
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Jacob Lifshay
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562c479b62
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sim/interpreter: fix StatePartLayout name in debug output
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2024-12-12 15:06:17 -08:00 |
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Jacob Lifshay
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393f78a14d
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sim: add WIP memory test
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2024-12-11 23:28:15 -08:00 |
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Jacob Lifshay
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8616ee4737
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tests/sim: test_enums works!
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2024-12-11 00:01:04 -08:00 |
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Jacob Lifshay
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5087f16099
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sim: fix assignments graph by properly including conditions as assignment inputs
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2024-12-11 00:00:21 -08:00 |
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Jacob Lifshay
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6b31e6d515
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sim: add .dot output for Assignments graph for debugging
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2024-12-10 23:40:33 -08:00 |
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Jacob Lifshay
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564ccb30bc
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sim/vcd: fix variable identifiers to follow verilog rules
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2024-12-10 23:39:17 -08:00 |
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Jacob Lifshay
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ca759168ff
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tests/sim: add WIP test for enums
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2024-12-10 23:37:26 -08:00 |
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Jacob Lifshay
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e4cf66adf8
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sim: implement memories, still needs testing
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2024-12-09 23:03:01 -08:00 |
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Jacob Lifshay
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cd0dd7b7ee
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change memory write latency to NonZeroUsize to match read latency being usize
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2024-12-09 23:01:40 -08:00 |
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Cesar Strauss
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2e7d685dc7
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add module exercising formal verification of memories
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2024-12-08 17:13:26 -03:00 |
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Jacob Lifshay
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9654167ca3
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sim: WIP working on memory
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2024-12-06 15:53:34 -08:00 |
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Jacob Lifshay
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3ed7827485
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sim: WIP adding memory support
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2024-12-05 21:35:23 -08:00 |
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Jacob Lifshay
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e504cfebfe
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add BoolOrIntType::copy_bits_from_bigint_wrapping and take BigInt arguments by reference
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2024-12-05 20:32:15 -08:00 |
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Jacob Lifshay
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9f42cab471
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change to version 0.3.0 for breaking change
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2024-12-05 20:26:28 -08:00 |
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Jacob Lifshay
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259bee39c2
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tests/sim: split expected output text into separate files
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2024-12-05 18:17:13 -08:00 |
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Jacob Lifshay
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643816d5b5
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vcd: handle enums with fields
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2024-12-04 21:03:29 -08:00 |
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Jacob Lifshay
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42afd2da0e
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sim: implement enums (except for connecting unequal enum types)
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2024-12-04 20:58:39 -08:00 |
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Jacob Lifshay
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15bc304bb6
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impl ToExpr for TargetBase
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2024-12-04 20:57:44 -08:00 |
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Jacob Lifshay
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4422157db8
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WIP adding enums to simulator
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2024-12-02 21:06:23 -08:00 |
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Jacob Lifshay
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d3f52292a1
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test doc tests in CI
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2024-12-01 20:21:26 -08:00 |
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Jacob Lifshay
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fd45465d35
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sim: add support for registers
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2024-12-01 20:14:13 -08:00 |
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Jacob Lifshay
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5e0548db26
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vcd: single bit signals have no spaces in their value changes
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2024-12-01 20:12:43 -08:00 |
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Jacob Lifshay
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12b3ba57f1
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add some ExprCastTo supertraits to ResetType to make generic code easier
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2024-12-01 20:10:25 -08:00 |
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Jacob Lifshay
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965fe53077
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deduce_resets: show more debugging info on assertion failure
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2024-12-01 20:09:17 -08:00 |
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Jacob Lifshay
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3abba7f9eb
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simulating circuits with deduced resets works
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2024-11-27 23:52:07 -08:00 |
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Jacob Lifshay
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6446b71afd
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deduce_resets works!
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2024-11-27 23:24:11 -08:00 |
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Jacob Lifshay
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d36cf92d7f
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make ToReset generic over the reset type
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2024-11-27 23:19:55 -08:00 |
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Jacob Lifshay
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d744d85c66
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working on deduce_resets
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2024-11-27 01:31:18 -08:00 |
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Jacob Lifshay
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358cdd10c8
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add more expr casts
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2024-11-27 01:30:28 -08:00 |
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Jacob Lifshay
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9128a84284
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Merge remote-tracking branch 'origin/master' into adding-simulator
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2024-11-26 21:28:22 -08:00 |
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Jacob Lifshay
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546010739a
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working on deduce_resets
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2024-11-26 21:26:56 -08:00 |
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Jacob Lifshay
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9b5f1218fd
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make ClockDomain and Reg generic over reset type
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2024-11-26 20:47:03 -08:00 |
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Jacob Lifshay
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89d84551f8
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add ResetType to the list of recognized type bounds
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2024-11-26 18:52:03 -08:00 |
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Jacob Lifshay
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c45624e3c2
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Fix SInt::for_value not accounting for sign bit for positive values
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Fixes: #4
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2024-11-26 16:26:29 -08:00 |
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Jacob Lifshay
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7851bf545c
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working on deduce_resets.rs
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2024-11-26 00:07:11 -08:00 |
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Jacob Lifshay
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3e3da53bd2
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working on deduce_resets
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2024-11-25 00:01:02 -08:00 |
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Jacob Lifshay
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fa50930ff8
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update petgraph dependency to include UnionFind::new_set()
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2024-11-25 00:00:26 -08:00 |
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Jacob Lifshay
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9516fe03a1
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increase rust version in CI too
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2024-11-24 14:46:25 -08:00 |
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Jacob Lifshay
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52ab134673
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increase rust version to support omitting match arms with uninhabited types
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2024-11-24 14:41:39 -08:00 |
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