sim: fix assignments graph by properly including conditions as assignment inputs

This commit is contained in:
Jacob Lifshay 2024-12-11 00:00:21 -08:00
parent 6b31e6d515
commit 5087f16099
Signed by: programmerjake
SSH key fingerprint: SHA256:HnFTLGpSm4Q4Fj502oCFisjZSoakwEuTsJJMSke63RQ

View file

@ -458,6 +458,9 @@ impl Assignments {
slot_readers
.keys_for_assignment(assignment_index)
.extend([&assignment.inputs]);
slot_readers
.keys_for_assignment(assignment_index)
.extend(&assignment.conditions);
let SlotSet(TypeParts {
small_slots,
big_slots,
@ -1400,6 +1403,30 @@ impl<'a> Extend<&'a SlotSet> for SlotToAssignmentIndexFullMapKeysForAssignment<'
}
}
impl<'a> Extend<&'a Cond> for SlotToAssignmentIndexFullMapKeysForAssignment<'_> {
fn extend<T: IntoIterator<Item = &'a Cond>>(&mut self, iter: T) {
iter.into_iter().for_each(|cond| match cond.body {
CondBody::IfTrue { cond } | CondBody::IfFalse { cond } => {
let CompiledValue {
range:
TypeIndexRange {
small_slots,
big_slots,
},
layout: _,
write: _,
} = cond;
self.extend(small_slots.iter());
self.extend(big_slots.iter());
}
CondBody::MatchArm {
discriminant,
variant_index: _,
} => self.extend([discriminant]),
});
}
}
impl Assignment {
fn new(
conditions: Interned<[Cond]>,