Emil J. Tywoniak
31618a7e99
proc_dff: add wire src attributes to dff cells
2025-11-19 11:34:05 +01:00
Emil J. Tywoniak
dac7134106
proc_mux: add src test
2025-11-19 11:34:05 +01:00
Emil J. Tywoniak
6349b3629c
gowin: lower LUT count sensitivity
2025-11-19 11:34:05 +01:00
Miodrag Milanovic
58d4e2c38e
ignore generated file
2025-11-17 13:35:38 +01:00
Robert O'Callahan
b870693393
Fix reset_auto_counter_id to correctly detect _NNN_ patterns
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This fixes a regression caused by commit c4c389fdd7
2025-11-17 09:21:59 +00:00
Miodrag Milanović
4bfdc62f65
Merge pull request #5472 from Anhijkt/arst-fsm-handling
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fsm_detect: add adff detection
2025-11-14 13:47:08 +01:00
Anhijkt
b08195a9cf
typo
2025-11-14 13:34:58 +02:00
Anhijkt
a75b999f13
fsm_detect: fix test
2025-11-14 13:25:51 +02:00
Emil J. Tywoniak
ae281720cf
tests: remove unstable FPGA synthesis result checks
2025-11-12 11:52:04 +01:00
Robert O'Callahan
df8444c5e7
Optimize IdString operations to avoid calling c_str()
2025-11-12 11:52:04 +01:00
Robert O'Callahan
e95ed7bbab
Make NEW_ID create IDs whose string allocation is delayed
2025-11-12 11:52:04 +01:00
Robert O'Callahan
54bde15329
Implement IdString garbage collection instead of refcounting.
2025-11-12 11:52:04 +01:00
KrystalDelusion
529886f7fb
Merge pull request #5473 from YosysHQ/krys/unsized_params
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Handle unsized params
2025-11-12 07:14:44 +13:00
Rahul Bhagwat
224109151d
add specific package imports and tests
2025-11-08 23:05:10 +05:30
Krystine Sherwin
7302bf9a66
Add CONST_FLAG_UNSIZED
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In order to support unsized constants being used as parameters, the `const` struct needs to know if it is unsized (so that the parameter can be used to set the size).
Add unsized flag to param value serialization and rtlil back-/front-end.
Add cell params to `tests/rtlil/everything.v`.
2025-11-07 17:45:07 +13:00
Krystine Sherwin
e4c5900acd
tests/verilog: Unsized params in cell
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Non-zero case fails with `read_verilog`, but passes with `verific` and `read_slang`.
2025-11-07 17:13:12 +13:00
Krystine Sherwin
a5cc905184
simplify.cc: Fix unsized const in params
2025-11-07 15:52:24 +13:00
KrystalDelusion
24b69cabaa
Merge pull request #5422 from YosysHQ/krys/SVI_support
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Catch partial support of SVI
2025-11-07 11:16:07 +13:00
Anhijkt
7d10a72490
fsm_detect: add adff detection
2025-11-06 23:29:47 +02:00
Emil J
a16fc9b4f3
Merge pull request #5467 from YosysHQ/emil/liberty-unquoted-expressions
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libparse: support unquoted expressions
2025-11-06 19:45:17 +01:00
Emil J. Tywoniak
2bf7aac9d1
Makefile: clean unit test on clean, ensure prepared to fix parallelism
2025-11-06 13:59:14 +01:00
Emil J
a2aeef6c96
Merge pull request #5461 from rocallahan/reset-abc-config
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Fix regression in configuring ABC techmapping
2025-11-06 11:58:04 +01:00
Robert O'Callahan
0f770285f3
Move global ABC configuration variables into AbcConfig and initialize them properly
2025-11-05 13:56:04 +00:00
Martin Povišer
45bb5c690d
Merge pull request #5460 from povik/timeest-comb
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timeest: Add top ports launching/sampling
2025-11-05 14:29:34 +01:00
Emil J. Tywoniak
90553267b0
libparse: fix quoting and negedge in filterlib -verilogsim
2025-11-05 14:13:58 +01:00
Emil J. Tywoniak
b0a3d6a3e7
libparse: fix up tests since liberty expression parsing now normalizes the form of these expressions
2025-11-05 13:06:12 +01:00
Emil J. Tywoniak
4fac7a1b20
libparse: fix space before closing paren in expressions
2025-11-05 13:05:56 +01:00
KrystalDelusion
52c108cd6a
Merge pull request #4596 from YosysHQ/emil/path-sep-refactor
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Refactor getting dirs and filenames from paths to files
2025-11-05 09:12:54 +13:00
Miodrag Milanović
0751b74e7a
Merge pull request #5441 from donn/pyosys_bugfixes
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pyosys: fix a number of regressions from 0.58
2025-11-04 07:36:25 +01:00
Krystine Sherwin
1a80c26bae
tests: Fix for macos
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Drop non standard `-t` flag for putting the destination directory first.
2025-11-04 11:11:01 +13:00
Martin Povišer
5fa7feccd3
timeest: Add top ports launching/sampling
2025-11-03 14:21:28 +01:00
Miodrag Milanović
d0a41d4f58
Merge pull request #5442 from rocallahan/verific-bus-ports
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Set `port_id` for Verific `PortBus` wires
2025-11-03 10:04:07 +01:00
Emil J. Tywoniak
b2fe335b2d
dfflibmap: fix next_state inversion propagation for DFF flops by inverting reset value polarity
2025-10-28 13:56:28 +01:00
Mohamed Gaber
d6b9158fa3
pyosys: fix regressions from 0.58
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- consistently use value semantics for objects passed along FFI boundary
(not ideal but matches previous behavior)
- add new overload of RTLIL::Module: addMemory that does not require a "donor" object
- the idea is `Module`, `Memory`, `Wire`, `Cell` and `Process` cannot be directly constructed in Python and can only be added to the existing memory hierarchy in `Design` using the `add` methods - `Memory` requiring a donor object was the odd one out here
- fix superclass member wrapping only looking at direct superclass for inheritance instead of recursively checking superclasses
- fix superclass member wrapping not using superclass's denylists
- fix Design's `__str__` function not returning a string
- fix the generator crashing if there's any `std::function` in a header
- misc: add a crude `__repr__` based on `__str__`
2025-10-26 02:21:40 +03:00
Robert O'Callahan
25aafab86b
Set port_id for Verific PortBus wires
2025-10-23 20:51:53 +00:00
Jannis Harder
6a0ee6e4fb
Revert sim's cycle_width default back to 10, but keep -width option
2025-10-20 14:40:05 +02:00
Miodrag Milanovic
f11a61b32b
sim: Make cycle width small as possible and configurable
2025-10-16 11:37:44 +02:00
Miodrag Milanović
759996b968
Merge pull request #5427 from donn/plugin_search_paths
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plugins: add search paths
2025-10-15 20:02:05 +02:00
Emil J
9d21585a4c
Merge pull request #5426 from rocallahan/parse-sigspec
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Don't stop parsing sigspec after a {} group.
2025-10-15 17:31:11 +02:00
Mohamed Gaber
e86797f029
plugins: add search path
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This uses the environment variable `YOSYS_PLUGIN_PATH` to provide multiple colon-delimited search paths for native plugins in a similar manner to `PATH` for executables and `PYTHONPATH` for Python modules.
This addresses https://github.com/YosysHQ/yosys/issues/2545 , allowing Yosys to be better packaged in non-FHS environments such as Nix.
2025-10-15 14:13:25 +03:00
Robert O'Callahan
e099a7d34a
Don't stop parsing sigspec after a {} group.
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Resolves #5424
2025-10-14 21:18:58 +00:00
Krystine Sherwin
c599d6a67e
tests/svinterfaces: re-chmod test script
2025-10-15 09:49:53 +13:00
Krystine Sherwin
7bb0a1913e
hierarchy.cc: Raise error on positional interface
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Add test to check that it does error.
2025-10-15 09:10:33 +13:00
Miodrag Milanović
2e3bfca294
Merge pull request #5419 from YosysHQ/micko/verific_fix_nocolumns
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verific: Fix error compiling without VERIFIC_LINEFILE_INCLUDES_COLUMNS
2025-10-14 17:05:31 +02:00
Miodrag Milanovic
7d2857b30f
Fix regex checks
2025-10-14 16:04:56 +02:00
N. Engelhardt
4513783a02
add tests
2025-10-14 15:48:16 +02:00
Krystine Sherwin
1eb5181700
Add tests/verilog/local_include.*
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`read_verilog` supports checking both the current directory and the source directory for relative includes. Make sure we aren't regressing that.
2025-10-14 15:47:08 +02:00
Emil J. Tywoniak
e9aedf505c
chtype: replace publish pass with chtype -publish_icells
2025-10-14 15:01:48 +02:00
Emil J. Tywoniak
c46df9ffdc
box_derive: rename -apply to -apply_derived_type
2025-10-13 17:24:32 +02:00
Emil J. Tywoniak
d7cea2c35c
box_derive: add -apply
2025-10-13 17:24:32 +02:00
