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Author SHA1 Message Date
Akash Levy
6e80c5348d
Merge pull request #209 from Silimate/opt_ffa_pt2
opt_first_fit_alloc updates + tests + some nice refactoring
2026-07-09 00:04:39 -07:00
Akash Levy
a022ca524d Fix flaky opt_priokey -strict and cover binary exclusive scan
ASLR-dependent ConstEval seeding let E4 miss OOR counterexamples; use a
deterministic seed and force OOR key collisions. Add I9 (NB=12) for the
thermometer fallback path Greptile flagged.

Co-authored-by: Cursor <cursoragent@cursor.com>
2026-07-08 23:20:22 -07:00
Akash Levy
665bd1099a opt_first_fit_alloc updates + tests + some nice refactoring 2026-07-08 22:33:13 -07:00
Akash Levy
95fdcbeafd Fix node retention 2026-07-08 19:16:07 -07:00
Akash Levy
945e4a403b tests/opt: add generalization coverage for the QoR pattern passes
Prove the three pattern detectors work on unseen inputs, not just the RTL
they were derived from. Because detection is functional (ConstEval
fingerprinting over the reachable input space), correctness is established
per case with equiv_opt -assert (full) or a SAT miter clamped to the
reachable range (non-power-of-two), and detection is confirmed with a
w:*tag* probe.

opt_priokey:
  D1-D3  spelling variants (explicit shift-or set, compound derived guard,
         accumulator also exported) -- all fire and prove equivalent.
  E1-E2  parameter sweep P=2..8, S=4..32.
  E3     non-power-of-two S=12 reachable-range equivalence via SAT miter.
  E4     same shape under -strict declines to rewrite (formal-flow safety).
  F1-F2  near-miss negatives (clear accumulator, multi-hot set) -> no rewrite.

opt_prienc (round-robin):
  RR4-RR5 DEPTH sweep 8/32, full sequential equivalence.
  RR6     non-power-of-two DEPTH=7 reachable-range equivalence (SAT miter).
  RR7     an entirely different spelling (upward wrap-scan, first-hit) of the
          same arbiter -- fires and proves equivalent.
  RR8     fixed-priority (no rotating pointer) negative.

opt_first_fit_alloc (coalesce):
  H1      inline same-category compare (no precomputed matrix) spelling.
  H2      different slot/field shape (N=8, NB=8, W=3).

All new cases pass locally; they avoid brittle exact cell-count asserts so
they are robust to upstream optimization drift.

Co-authored-by: Cursor <cursoragent@cursor.com>
2026-07-06 22:05:50 -07:00
Akash Levy
087f5bd254
Merge pull request #202 from Silimate/akashlevy/qor-pattern-passes
opt: recognize three QoR logic-depth patterns
2026-07-06 13:56:29 -07:00
Akash Levy
00e48706df opt: recognize three QoR logic-depth patterns
Extend two existing opt passes and add one new pass to collapse
serial/dynamic-index structures that were leaving high logic depth:

- opt_first_fit_alloc: recognize the "coalesce-matrix" first-fit
  allocator variant (same_cat[i][k] coalescing gated on the leader's
  enable, driven from a raw input enable). Rewrite both the lane_slot
  allocation and the xbar field gather from one shared log-depth scan.

- opt_prienc: detect round-robin / rotated-priority scans (req scanned
  from idx_last downward with wraparound) and rewrite the depth-N
  idx--/req[idx] mux chain to rotate -> log-depth priority-encode ->
  unrotate.

- opt_priokey (new): recognize priority-by-key one-hot accumulators and
  replace each dynamic taken[key] read ($shiftx/$bmux) with the
  equivalent pairwise-key-compare reduction, dropping the wide dynamic
  indexing. Supports -strict for full-key-range formal validation.

Each includes self-contained tests (equiv_opt / sat -prove-asserts,
mux-bound and negative cases) in tests/opt/.

Co-authored-by: Cursor <cursoragent@cursor.com>
2026-07-06 12:56:38 -07:00
Akash Levy
19c28d0e00 Merge branch 'main' into carvenetlist 2026-07-06 08:37:13 -07:00
Akash Levy
a2e38e2022 Merge from upstream 2026-07-06 07:47:32 -07:00
Akash Levy
3aa52fb1e5 Pass carvenetlist 2026-07-06 07:44:01 -07:00
Mohamed Gaber
56dd057ab4
test/ci fixes
- fix incorrect repo_url output
- fix parsing in test_splitnets to match new format
- fix silimate-shell.nix referring to removed derivation
2026-07-02 18:56:25 +03:00
Akash Levy
77cd9e1edc stat bugfix 2026-06-28 20:28:23 -07:00
Akash Levy
d0380bf8f0 New stat 2026-06-28 01:18:21 -07:00
Akash Levy
3783a820ee Merge remote-tracking branch 'upstream' into merge3 2026-06-25 04:51:46 -07:00
Akash Levy
2acff6a62c tests: fix sv_implicit_ports for port-resize log severity change
"Reduce port resize to warning" changed the resize message from
log_warning() to log(), which -q suppresses. Run the resize case without
-q and drop the stale "Warning: " prefix so the message is observed.

Co-authored-by: Cursor <cursoragent@cursor.com>
2026-06-24 23:52:31 -07:00
Miodrag Milanovic
a689342207 Remove trailing whitespaces 2026-06-23 07:24:59 +02:00
Miodrag Milanovic
48a3dcc02a End of file fix 2026-06-23 07:23:41 +02:00
Miodrag Milanovic
3ac58b3ac1 Fixed line endings 2026-06-23 07:17:22 +02:00
Miodrag Milanovic
1f0ac8fffc Remove utf-8 marker 2026-06-23 07:14:20 +02:00
Miodrag Milanovic
f362e1db0e Remove executable flag from .v files 2026-06-23 07:12:43 +02:00
KrystalDelusion
e20a9168fb
Merge pull request #5971 from YosysHQ/krys/upto_indexing
write_verilog: Fix upto indexing for single bit
2026-06-22 23:04:16 +00:00
nella
57ec784983
Merge pull request #5953 from YosysHQ/nella/muxcover-enhancements
Add muxcover x peepopt regression test (#964).
2026-06-22 10:13:43 +00:00
nella
8f5d2d5894 Use -assert-none. 2026-06-22 11:12:00 +02:00
nella
3d0c868af0
Merge pull request #5952 from YosysHQ/nella/vector-index
Optimize upto vector indexing (Fix #892).
2026-06-22 09:05:26 +00:00
nella
6ffc938a75
Merge pull request #5701 from YosysHQ/gus/sim-with-vcd-tuneup
Add warnings and errors to `sim -r` with VCD code path
2026-06-22 09:02:32 +00:00
Mohamed Gaber
0e7671c1b3 Merge remote-tracking branch 'origin/main' into update_from_upstream 2026-06-21 15:07:32 +03:00
Akash Levy
dc995eba98 opt_first_fit_alloc 2026-06-21 00:56:39 -07:00
Krystine Sherwin
b77bb851ed
tests: Add mixed_upto write_verilog test 2026-06-19 11:20:01 +12:00
Mohamed Gaber
4db5fe5f6d
Merge remote-tracking branch 'silimate/main' into update_from_upstream 2026-06-19 00:07:08 +03:00
Mohamed Gaber
d423c5c03a
chore: disable failing tests until we can take a deeper look at them 2026-06-18 23:02:21 +03:00
nella
5d7486115a
Merge pull request #5887 from YosysHQ/nella/fix-signedness-4402
Fix: `read_verilog` doesn't respect `signed` keyword
2026-06-18 16:53:37 +00:00
nella
2195277b5a
Merge pull request #5960 from YosysHQ/nella/latch-infer
proc_dlatch - infer $adlatch (Fix #5910).
2026-06-18 16:50:48 +00:00
nella
c99a037c33
Merge pull request #5886 from YosysHQ/nella/fix-signedness-5745
Fix  `chparam` values are unsigned when using read_verilog frontend
2026-06-18 16:50:22 +00:00
Akash Levy
9df378f8ac opt_carry_select pass 2026-06-18 02:36:29 -07:00
Mohamed Gaber
98a1db2756
equiv_opt: support -ignore-unknown-cells 2026-06-17 21:10:02 +03:00
Mohamed Gaber
8267cf87b5
infer_ce: remove pass 2026-06-17 21:01:20 +03:00
Miodrag Milanović
e2903c4a5c
Merge pull request #5959 from YosysHQ/improve_test
Improve test
2026-06-16 08:46:11 +00:00
Mohamed Gaber
569ab1231b
Merge remote-tracking branch 'silimate/main' into update_from_upstream 2026-06-16 02:02:41 +03:00
Akash Levy
23b021a26b Fix opt_compact_prefix wide packs and opt_priority_onehot max-width test
The tests/silimate suite (which aborted the Run tests CI job) exposed two
issues in the generalized passes:

- opt_compact_prefix: the forward dense pack regressions at 64 and 128 bits
  no longer rewrote. The ConstEval fingerprint was uint64_t-based (capped at
  62 bits) and the per-cone cell cap (max_width*96) was below the O(width^2)
  cell count of a wide pack. The fingerprint now drives whole-width Const
  bit patterns (no width cap) and the cone cap scales quadratically; total
  work stays bounded by the shared walk/eval budgets.

- opt_priority_onehot: the "max-width below lane count" negative test set
  max_width=8 on a 16-lane design expecting no rewrite, but the generalized
  matcher legitimately (and equivalence-provably) rewrites the 8-lane
  sub-region. The test now uses max_width=3 (below min_width 4) to verify
  the width gate suppresses all matching.

Co-authored-by: Cursor <cursoragent@cursor.com>
2026-06-15 12:02:09 -07:00
nella
c0709b1b4e Fixup issue test. 2026-06-15 16:23:44 +02:00
nella
eb4703808a Add tests. 2026-06-15 15:46:13 +02:00
Miodrag Milanovic
247bcfed65 Remove old Makefile and fix documentation 2026-06-15 15:25:58 +02:00
Emil J. Tywoniak
48c1e1a724 tests: remove hana test with multiple drivers 2026-06-15 15:08:26 +02:00
Miodrag Milanovic
2bab5d3fa5 Add VERBOSE (and V) option to Makefiles 2026-06-15 14:48:11 +02:00
nella
309b7d2496 Verify kogge stone impl. 2026-06-12 14:55:47 +02:00
nella
c44d24d9fd Add missing -assert to equiv_opt calls. 2026-06-11 01:08:36 +02:00
Mohamed Gaber
0217efb67d
Merge remote-tracking branch 'silimate/main' into update_from_upstream 2026-06-10 20:33:33 +03:00
Mohamed Gaber
d986ee91ac
CMake: integrate silimate additions and extensions
- update CMakeLists.txt to load two new files:
  - SilimateConfig.cmake: sets Silimate configuration options and defaults
  - SilimateVerific.cmake: compiles Verific library, optionally with Silimate modifications
- include silimate tests in test Makefile
2026-06-10 20:27:52 +03:00
nella
83a8245734 Add muxcover regression test. 2026-06-10 14:46:04 +02:00
nella
601cd7ba5f Add tests. 2026-06-10 11:30:03 +02:00