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CMake: integrate silimate additions and extensions

- update CMakeLists.txt to load two new files:
  - SilimateConfig.cmake: sets Silimate configuration options and defaults
  - SilimateVerific.cmake: compiles Verific library, optionally with Silimate modifications
- include silimate tests in test Makefile
This commit is contained in:
Mohamed Gaber 2026-06-10 20:27:52 +03:00
parent e58125b605
commit d986ee91ac
No known key found for this signature in database
15 changed files with 380 additions and 22 deletions

View file

@ -283,6 +283,8 @@ set_package_properties(GTest PROPERTIES
TYPE RECOMMENDED
)
include(SilimateConfig)
# Configure features based on dependency availability.
message(VERBOSE "Conditional features:")
condition(YOSYS_ENABLE_GLOB HAVE_GLOB)
@ -298,6 +300,8 @@ condition(YOSYS_ENABLE_TCL tcl_FOUND AND libtommath_FOUND AND NOT YOSYS_WITHOUT_
condition(YOSYS_ENABLE_PYTHON Python3Devel_FOUND AND PyosysEnv_FOUND AND YOSYS_WITH_PYTHON)
condition(YOSYS_ENABLE_VERIFIC YOSYS_VERIFIC_DIR AND zlib_FOUND)
include(SilimateVerific)
# Describe dependencies and features
# CMake 4.0 would let us use proper conditions, but that's too new for now.
add_feature_info(have_glob YOSYS_ENABLE_GLOB "Glob expansion in filenames")

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@ -0,0 +1,6 @@
# Always force disable GNU Readline, GPL trap library
set(YOSYS_ENABLE_READLINE OFF)
set(YOSYS_VERIFIC_DIR ${PROJECT_SOURCE_DIR}/verific)
set(YOSYS_WITH_PYTHON ON)
add_library(verific INTERFACE)

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@ -0,0 +1,29 @@
import sys
import pathlib
import subprocess
out = sys.argv[1]
files = sys.argv[2:]
final_archive_objects = []
custom_silimate_symbols = set()
for object in filter(lambda x: x.endswith(".o"), files):
final_archive_objects.append(object)
result = subprocess.check_output(["nm", "-gjU", object], encoding="utf8")
custom_silimate_symbols.update(filter(lambda x: len(x.strip()), result.splitlines()))
symbol_localize_args = [f"-L{symbol}" for symbol in custom_silimate_symbols]
cwd = pathlib.Path(".").resolve()
for archive in filter(lambda x: x.endswith(".a"), files):
file_path = pathlib.Path(archive)
name = file_path.stem
object_dir = cwd / "verific-merge" / name
object_dir.mkdir(parents=True, exist_ok=True)
subprocess.check_call(["ar", "x", archive], cwd=object_dir)
for object in object_dir.glob("*"):
if len(symbol_localize_args):
subprocess.check_call(["objcopy", *symbol_localize_args, object])
final_archive_objects.append(object)
subprocess.check_call(["ar", "rcs", out, *final_archive_objects])

162
cmake/SilimateVerific.cmake Normal file
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@ -0,0 +1,162 @@
if (YOSYS_ENABLE_VERIFIC)
# user-facing options
option(WITH_VERIFIC_SYSTEMVERILOG "" ON)
option(WITH_VERIFIC_VHDL "" ON)
option(WITH_VERIFIC_HIER_TREE "" ON)
option(WITH_VERIFIC_SILIMATE_EXTENSIONS "" ON)
option(WITH_VERIFIC_YOSYSHQ_EXTENSIONS "" OFF)
option(WITH_VERIFIC_EDIF "" OFF)
option(WITH_VERIFIC_LIBERTY "" OFF)
option(WITH_VERIFIC_UPF "" OFF)
option(WITH_VERIFIC_SILIMATE_EXTENSIONS "Enable Silimate-specific options for Verific" ON)
# further checks and conditions
condition(ENABLE_VERIFIC_SYSTEMVERILOG WITH_VERIFIC_SYSTEMVERILOG)
condition(ENABLE_VERIFIC_VHDL WITH_VERIFIC_VHDL)
condition(ENABLE_VERIFIC_HIER_TREE WITH_VERIFIC_HIER_TREE)
condition(ENABLE_VERIFIC_SILIMATE_EXTENSIONS WITH_VERIFIC_SILIMATE_EXTENSIONS)
condition(ENABLE_VERIFIC_YOSYSHQ_EXTENSIONS WITH_VERIFIC_YOSYSHQ_EXTENSIONS)
condition(ENABLE_VERIFIC_EDIF WITH_VERIFIC_EDIF)
condition(ENABLE_VERIFIC_LIBERTY WITH_VERIFIC_LIBERTY)
condition(ENABLE_VERIFIC_UPF WITH_VERIFIC_UPF AND YOSYS_ENABLE_TCL)
# construct component list
list(APPEND YOSYS_VERIFIC_COMPONENTS database util containers pct)
if (ENABLE_VERIFIC_HIER_TREE)
list(APPEND YOSYS_VERIFIC_COMPONENTS hier_tree)
endif()
if (ENABLE_VERIFIC_SYSTEMVERILOG)
list(APPEND YOSYS_VERIFIC_COMPONENTS verilog)
endif()
if (ENABLE_VERIFIC_VHDL)
list(APPEND YOSYS_VERIFIC_COMPONENTS vhdl)
endif()
if (ENABLE_VERIFIC_EDIF)
list(APPEND YOSYS_VERIFIC_COMPONENTS edif)
endif()
if (ENABLE_VERIFIC_LIBERTY)
list(APPEND YOSYS_VERIFIC_COMPONENTS synlib)
endif()
if (ENABLE_VERIFIC_UPF)
list(APPEND YOSYS_VERIFIC_COMPONENTS hdl_file_sort verilog_nl commands upf)
endif()
if (ENABLE_VERIFIC_YOSYSHQ_EXTENSIONS)
list(APPEND YOSYS_VERIFIC_COMPONENTS extensions)
endif()
# Prepare Silimate-specific objects
flex_target(veri_flex
${YOSYS_VERIFIC_DIR}/verilog/verilog.l
veri_lex.cpp
COMPILE_FLAGS "--prefix=veri --noline"
)
bison_target(veri_yacc
${YOSYS_VERIFIC_DIR}/verilog/verilog.y
veri_yacc.cpp
DEFINES_FILE veri_yacc.h
COMPILE_FLAGS "--name-prefix=veri --no-lines"
)
add_library(verific_database_modified OBJECT
${YOSYS_VERIFIC_DIR}/database/DBSilimate.cpp
)
target_include_directories(verific_database_modified PRIVATE ${YOSYS_VERIFIC_DIR}/containers ${YOSYS_VERIFIC_DIR}/containers ${YOSYS_VERIFIC_DIR}/util)
add_library(verific_verilog_modified OBJECT
${YOSYS_VERIFIC_DIR}/verilog/VeriSilimate.cpp
)
target_include_directories(verific_verilog_modified PRIVATE
${YOSYS_VERIFIC_DIR}/containers
${YOSYS_VERIFIC_DIR}/database
${YOSYS_VERIFIC_DIR}/util
${YOSYS_VERIFIC_DIR}/hier_tree
${YOSYS_VERIFIC_DIR}/vhdl
${YOSYS_VERIFIC_DIR}/verilog
)
add_library(verific_vparser_modified OBJECT
veri_yacc.cpp
)
target_include_directories(verific_vparser_modified PRIVATE
${YOSYS_VERIFIC_DIR}/containers
${YOSYS_VERIFIC_DIR}/verilog
${YOSYS_VERIFIC_DIR}/util
)
add_library(verific_util_modified OBJECT
${YOSYS_VERIFIC_DIR}/util/UtilSilimate.cpp
)
target_include_directories(verific_util_modified PRIVATE ${YOSYS_VERIFIC_DIR}/containers ${YOSYS_VERIFIC_DIR}/util)
string(REPLACE ".a" ".raw.a" VERIFIC_RAW_LIB_SUFFIX "${VERIFIC_LIB_SUFFIX}")
# prepare object list based on component list + whether to load silimate
# customizations
list(APPEND VERIFIC_OBJECTS $<TARGET_OBJECTS:verific_vparser_modified>)
foreach(component ${YOSYS_VERIFIC_COMPONENTS})
if (component STREQUAL "util")
list(APPEND VERIFIC_OBJECTS ${YOSYS_VERIFIC_DIR}/${component}/util${VERIFIC_RAW_LIB_SUFFIX})
if (ENABLE_VERIFIC_SILIMATE_EXTENSIONS)
list(APPEND VERIFIC_OBJECTS $<TARGET_OBJECTS:verific_util_modified>)
endif()
elseif (component STREQUAL "database")
list(APPEND VERIFIC_OBJECTS ${YOSYS_VERIFIC_DIR}/${component}/database${VERIFIC_RAW_LIB_SUFFIX})
if (ENABLE_VERIFIC_SILIMATE_EXTENSIONS)
list(APPEND VERIFIC_OBJECTS $<TARGET_OBJECTS:verific_database_modified>)
endif()
elseif (component STREQUAL "verilog")
list(APPEND VERIFIC_OBJECTS ${YOSYS_VERIFIC_DIR}/${component}/verilog${VERIFIC_RAW_LIB_SUFFIX})
if (ENABLE_VERIFIC_SILIMATE_EXTENSIONS)
list(APPEND VERIFIC_OBJECTS $<TARGET_OBJECTS:verific_verilog_modified>)
endif()
else()
list(APPEND VERIFIC_OBJECTS ${YOSYS_VERIFIC_DIR}/${component}/${component}${VERIFIC_LIB_SUFFIX})
endif()
endforeach()
# prepare merged .a object using custom Python script
add_custom_command(
OUTPUT ${PROJECT_BINARY_DIR}/verific_merged.a
DEPENDS
${VERIFIC_OBJECTS}
COMMAND
${Python3_EXECUTABLE} ${CMAKE_CURRENT_LIST_DIR}/SilimateVerific-merge-archive.py ${CMAKE_CURRENT_BINARY_DIR}/verific_merged.a ${VERIFIC_OBJECTS}
)
add_custom_target(verific_merged DEPENDS ${PROJECT_BINARY_DIR}/verific_merged.a)
# prepare interface as in YosysVerific.cmake
get_verific_options(verific_include_dirs verific_libraries ${YOSYS_VERIFIC_COMPONENTS})
target_include_directories(verific INTERFACE
${verific_include_dirs}
)
target_link_libraries(verific INTERFACE
$<LINK_LIBRARY:WHOLE_ARCHIVE,${PROJECT_BINARY_DIR}/verific_merged.a>
PkgConfig::zlib
)
if (NOT YOSYS_VERIFIC_FEATURES)
foreach (component ${YOSYS_VERIFIC_COMPONENTS})
if (component MATCHES "^(hier_tree|vhdl|edif|extensions)$")
list(APPEND YOSYS_VERIFIC_FEATURES ${component})
elseif (component STREQUAL "verilog")
list(APPEND YOSYS_VERIFIC_FEATURES systemverilog)
elseif (component STREQUAL "synlib")
list(APPEND YOSYS_VERIFIC_FEATURES liberty)
endif()
endforeach()
endif()
message(STATUS "Verific library components: ${YOSYS_VERIFIC_COMPONENTS}")
message(STATUS "Verific frontend features: ${YOSYS_VERIFIC_FEATURES}")
set(verific_data_files)
if ("vhdl" IN_LIST YOSYS_VERIFIC_FEATURES)
foreach (vdb_std 1987 1993 2008 2019)
set(vdb_std_root ${YOSYS_VERIFIC_DIR}/vhdl_packages/vdbs_${vdb_std})
file(GLOB_RECURSE vdb_files RELATIVE ${vdb_std_root} ${vdb_std_root}/*)
foreach (vdb_file ${vdb_files})
list(APPEND verific_data_files
verific/vhdl_vdbs_${vdb_std}/${vdb_file}
${YOSYS_VERIFIC_DIR}/vhdl_packages/vdbs_${vdb_std}/${vdb_file}
)
endforeach()
endforeach()
endif()
endif()

View file

@ -2,7 +2,7 @@ if (NOT YOSYS_ENABLE_VERIFIC)
# Stub interface library.
add_library(verific INTERFACE)
set(verific_data_files)
else()
elseif (NOT TARGET verific)
if (NOT YOSYS_VERIFIC_COMPONENTS)
get_verific_components(YOSYS_VERIFIC_COMPONENTS)
endif()
@ -58,6 +58,7 @@ yosys_frontend(verific
$<$<IN_LIST:edif,${YOSYS_VERIFIC_FEATURES}>:VERIFIC_EDIF_SUPPORT>
$<$<IN_LIST:liberty,${YOSYS_VERIFIC_FEATURES}>:VERIFIC_LIBERTY_SUPPORT>
$<$<IN_LIST:extensions,${YOSYS_VERIFIC_FEATURES}>:YOSYSHQ_VERIFIC_EXTENSIONS>
$<${ENABLE_VERIFIC_SILIMATE_EXTENSIONS}:SILIMATE_VERIFIC_EXTENSIONS>
LIBRARIES
verific
REQUIRES

View file

@ -7,5 +7,6 @@ add_subdirectory(opt)
add_subdirectory(pmgen)
add_subdirectory(proc)
add_subdirectory(sat)
add_subdirectory(silimate)
add_subdirectory(techmap)
add_subdirectory(tests)

View file

@ -80,6 +80,26 @@ yosys_pass(opt_balance_tree
opt_balance_tree.cc
)
yosys_pass(opt_addcin
opt_addcin.cc
)
yosys_pass(opt_andor_pmux
opt_andor_pmux.cc
)
yosys_pass(opt_argmax
opt_argmax.cc
)
yosys_pass(opt_parallel_prefix
opt_parallel_prefix.cc
)
yosys_pass(opt_prienc
opt_prienc.cc
)
pmgen_command(peepopt
peepopt_shiftmul_right.pmg
peepopt_shiftmul_left.pmg
@ -88,6 +108,10 @@ pmgen_command(peepopt
peepopt_muldiv.pmg
peepopt_muldiv_c.pmg
peepopt_formal_clockgateff.pmg
peepopt_modshr_onehot.pmg
peepopt_addsub_c.pmg
peepopt_muxorder.pmg
peepopt_sub_neg.pmg
PREFIX
peepopt
)

View file

@ -0,0 +1,126 @@
yosys_pass(activity
activity.cc
)
yosys_pass(annotate_cell_fanout
annotate_cell_fanout.cc
)
yosys_pass(annotate_ff_width
annotate_ff_width.cc
)
yosys_pass(breakreduce
breakreduce.cc
)
yosys_pass(breaksop
breaksop.cc
)
yosys_pass(bus_rebuild
bus_rebuild.cc
)
yosys_pass(fanoutbuf
fanoutbuf.cc
)
yosys_pass(l2j_frontend
l2j_frontend.cc
)
yosys_pass(mux_push
mux_push.cc
)
yosys_pass(obs_clean
obs_clean.cc
)
yosys_pass(segv
segv.cc
)
yosys_pass(reg_rename
reg_rename.cc
)
yosys_pass(infer_ce
infer_ce.cc
)
yosys_pass(ffnormpol
ffnormpol.cc
)
yosys_pass(report_fanout
report_fanout.cc
)
yosys_pass(splitfanout
splitfanout.cc
)
yosys_pass(splitlarge
splitlarge.cc
)
yosys_pass(splitnetlist
splitnetlist.cc
)
yosys_pass(opt_timing_balance
opt_timing_balance.cc
)
yosys_pass(cone_partition
cone_partition.cc
)
yosys_pass(clkmerge
clkmerge.cc
)
yosys_pass(opt_boundary
opt_boundary.cc
)
yosys_pass(opt_vps
opt_vps.cc
)
yosys_pass(opt_compact_prefix
opt_compact_prefix.cc
)
yosys_pass(infer_icg
infer_icg.cc
)
pmgen_command(peepopt_expand
peepopt_expand.pmg
PREFIX
peepopt_expand
)
yosys_pass(peepopt_expand
opt_expand.cc
${PMGEN_peepopt_expand_OUTPUT}
)
pmgen_command(peepopt_shift
peepopt_combine_shifts.pmg
peepopt_expand_shifts.pmg
PREFIX
peepopt_shift
)
yosys_pass(peepopt_shift
opt_shift.cc
${PMGEN_peepopt_shift_OUTPUT}
)
pmgen_command(peepopt_muxmode
peepopt_muxmode.pmg
peepopt_muxinvprop.pmg
PREFIX
peepopt_muxmode
)
yosys_pass(peepopt_muxmode
muxmode.cc
${PMGEN_peepopt_muxmode_OUTPUT}
)
pmgen_command(peepopt_negopt
peepopt_manual2sub.pmg
peepopt_sub2neg.pmg
peepopt_negexpand.pmg
peepopt_negneg.pmg
peepopt_negmux.pmg
peepopt_negrebuild.pmg
peepopt_muxneg.pmg
peepopt_neg2sub.pmg
PREFIX
peepopt_negopt
)
yosys_pass(peepopt_negopt
negopt.cc
${PMGEN_peepopt_negopt_OUTPUT}
)

View file

@ -25,7 +25,7 @@ PRIVATE_NAMESPACE_BEGIN
bool did_something;
#include "passes/silimate/peepopt_muxmode.h"
#include "passes/silimate/peepopt_muxmode_pm.h"
struct MuxmodePass : public Pass {
MuxmodePass() : Pass("muxmode", "convert primitives to muxes") { }
@ -52,7 +52,7 @@ struct MuxmodePass : public Pass {
{
log("ITERATION %d OF MUXMODE\n", i);
did_something = false;
peepopt_pm pm(module);
peepopt_muxmode_pm pm(module);
pm.setup(module->selected_cells());
pm.run_muxmode();
pm.run_muxinvprop();

View file

@ -51,7 +51,7 @@ static SigSpec strip_ext_for_match(SigSpec sig)
return sig.extract(0, n);
}
#include "passes/silimate/peepopt_negopt.h"
#include "passes/silimate/peepopt_negopt_pm.h"
struct NegoptPass : public Pass {
NegoptPass() : Pass("negopt", "optimize negation patterns in arithmetic") { }
@ -130,7 +130,7 @@ struct NegoptPass : public Pass {
// pre-subpass creates the patterns they match
// separate pm instances so sub2neg sees the $sub cells manual2sub creates.
{
peepopt_pm pm(module);
peepopt_negopt_pm pm(module);
pm.setup(module->selected_cells());
log_pass_event("Starting", "manual2sub");
pm.run_manual2sub();
@ -138,7 +138,7 @@ struct NegoptPass : public Pass {
log_flush();
}
{
peepopt_pm pm(module);
peepopt_negopt_pm pm(module);
pm.setup(module->selected_cells());
log_pass_event("Starting", "sub2neg");
pm.run_sub2neg();
@ -150,7 +150,7 @@ struct NegoptPass : public Pass {
did_something = true;
for (int iter = 0; iter < max_iterations && did_something; iter++) {
did_something = false;
peepopt_pm pm(module);
peepopt_negopt_pm pm(module);
pm.setup(module->selected_cells());
log_pass_event("Starting", "negexpand", iter);
@ -178,7 +178,7 @@ struct NegoptPass : public Pass {
did_something = true;
for (int iter = 0; iter < max_iterations && did_something; iter++) {
did_something = false;
peepopt_pm pm(module);
peepopt_negopt_pm pm(module);
pm.setup(module->selected_cells());
log_pass_event("Starting", "negrebuild", iter);

View file

@ -25,7 +25,7 @@ PRIVATE_NAMESPACE_BEGIN
bool did_something;
#include "passes/silimate/peepopt_expand.h"
#include "passes/silimate/peepopt_expand_pm.h"
struct OptExpandPass : public Pass {
OptExpandPass() : Pass("opt_expand", "expand conjunction") { }
@ -65,7 +65,7 @@ struct OptExpandPass : public Pass {
{
log("ITERATION OF OPT_EXPAND\n");
did_something = false;
peepopt_pm pm(module);
peepopt_expand_pm pm(module);
pm.setup(module->selected_cells());
pm.run_expand();
}

View file

@ -25,7 +25,7 @@ PRIVATE_NAMESPACE_BEGIN
bool did_something;
#include "passes/silimate/peepopt_shift.h"
#include "passes/silimate/peepopt_shift_pm.h"
struct OptShiftPass : public Pass {
OptShiftPass() : Pass("opt_shift", "shift optimizations: combine and expand") { }
@ -95,7 +95,7 @@ struct OptShiftPass : public Pass {
for (int i = 0; did_something && i < max_iters; i++)
{
did_something = false;
peepopt_pm pm(module);
peepopt_shift_pm pm(module);
pm.setup(module->selected_cells());
if (run_combine)
pm.run_combine_shifts();

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@ -75,6 +75,7 @@ MK_TEST_DIRS += ./memories
MK_TEST_DIRS += ./aiger
MK_TEST_DIRS += ./alumacc
MK_TEST_DIRS += ./check_mem
MK_TEST_DIRS += ./silimate
all: vanilla-test

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@ -0,0 +1,14 @@
#!/usr/bin/env python3
import sys
sys.path.append("..")
import gen_tests_makefile
def main():
gen_tests_makefile.generate(["-y", "-t"])
if __name__ == "__main__":
main()

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@ -1,10 +0,0 @@
#!/usr/bin/env bash
set -e
for x in *.ys; do
echo "Running $x.."
../../yosys -ql ${x%.ys}.log $x
done
for x in *.tcl; do
echo "Running $x.."
../../yosys -ql ${x%.tcl}.log -c $x
done