nella
66bd4716cf
rtlil use newcelltypes.
2026-03-04 12:39:45 +01:00
Emil J. Tywoniak
6d4736269b
newcelltypes: extend testing
2026-03-04 12:39:45 +01:00
Emil J. Tywoniak
ae10e9e955
pyosys: disable test
2026-03-04 12:39:45 +01:00
Emil J. Tywoniak
f594014bef
newcelltypes: proper bounds for unit test
2026-03-04 12:39:45 +01:00
Emil J. Tywoniak
d91e1c8607
newcelltypes: test against builtin_ff_cell_types
2026-03-04 12:22:14 +01:00
Emil J. Tywoniak
2d7d6ca10b
newcelltypes: unit test
2026-03-04 12:22:14 +01:00
Miodrag Milanović
05d1d56b9d
Merge pull request #5704 from apullin/apullin/abc9-no-loops-fix
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abc9: preserve topological-loop asserts with targeted SCC fallback
2026-03-04 11:09:38 +01:00
Emil J. Tywoniak
5b4603c54f
dfflibmap: fix formal $dffsr tests with sat, prove "no s&r" assumption only needed when appropriate
2026-03-03 10:35:03 +01:00
Emil J. Tywoniak
024408004a
dfflibmap: allow formal dffsr mapping tests with clk2fflogic
2026-03-03 10:34:29 +01:00
Emil J. Tywoniak
2dddc53ccf
dfflibmap: test dffsr and dffsre from proc with equiv
2026-03-03 10:34:29 +01:00
Emil J. Tywoniak
c13a623dbc
dfflibmap: test dffsr with either priority liberty file
2026-03-03 10:34:29 +01:00
Emil J. Tywoniak
ffb76a3486
dfflibmap: test dffsr mapping without assume
2026-03-03 10:34:29 +01:00
likeamahoney
e9442194f2
support automatic lifetime qualifier on procedural variables
2026-02-27 20:42:52 +03:00
tondapusili
f46b8d2a44
silimate: add opt_timing_balance pass and tests
2026-02-27 09:13:39 -08:00
Andrew Pullin
5970be33fb
abc9: preserve topological-loop asserts with targeted SCC fallback
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A real-world ABC9 flow hit residual combinational loops after SCC breaking, tripping the prep_xaiger loop assertion.
Keep the existing topological assertions in place (prep_xaiger and reintegrate still assert no_loops).
To handle residual non-box loops, add a targeted fallback in prep_xaiger: when loops remain after normal SCC breaking, insert additional $__ABC9_SCC_BREAKER cuts on non-box loop cells, rebuild toposort, and then re-check the existing assertion.
Also keep pre-ABC9 SCC tagging on all cell types (scc -all_cell_types) and add a regression test (tests/techmap/abc9-nonbox-loop-with-box.ys).
2026-02-26 22:30:32 -08:00
Emil J
5f8489d36d
Merge pull request #5666 from YosysHQ/emil/equiv_induct-missing-model-errors
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equiv_induct: error on missing model
2026-02-25 15:39:31 +01:00
Krystine Sherwin
fd311c5501
tests/arch/gowin: Add wr_en test
2026-02-22 09:00:37 +01:00
Emil J
74f7b0cf92
Merge pull request #5685 from chathhorn-galois/chathhorn/issue5684
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Fix segfault from shift with 0-width signed arg.
2026-02-20 11:53:05 +01:00
Emil J
53509a9b2a
Merge pull request #5692 from YosysHQ/emil/modtools-fix-db-port-deletion
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modtools: fix database sanity
2026-02-20 10:49:28 +01:00
Akash Levy
3e9a5c68b1
Switch back to main Verific without VHDL support
2026-02-18 21:57:14 -08:00
Emil J. Tywoniak
abc7563a35
modtools: add ModIndex unit test
2026-02-18 22:15:44 +01:00
Akash Levy
650c636d39
Fixups
2026-02-18 01:12:35 -08:00
Akash Levy
33c2c88fa4
Bump Yosys to latest from upstream
2026-02-17 23:41:39 -08:00
Miodrag Milanović
ac96f318ef
Merge pull request #5676 from YosysHQ/emil/unit-test-by-default
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Run unit tests on make test
2026-02-13 15:02:50 +01:00
Akash Levy
2b247d165b
Merge from main
2026-02-13 04:14:08 -08:00
Chris Hathhorn
1e852cef16
Fix segfault from shift with 0-width signed arg.
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Fixes #5684 .
2026-02-12 22:03:42 -06:00
Miodrag Milanović
e4b32d6aae
Merge pull request #5670 from max-kudinov/gowin_mult
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Gowin: Add DSP inference for GW1N and GW2A
2026-02-12 14:30:27 +01:00
Miodrag Milanovic
cc79c6a761
Support building out of tree, but keep always in tests/unit
2026-02-12 12:17:07 +01:00
Maxim Kudinov
b055ea05fd
gowin: dsp: Add mult inference tests
2026-02-12 14:12:32 +03:00
Gus Smith
7a0774c3bb
Don't dump params by default
2026-02-11 08:33:39 -08:00
Gus Smith
b0021e5b10
Add tests
2026-02-11 08:10:57 -08:00
Gus Smith
e3db8fee6f
Merge pull request #3459 from gs-jgj/feature_dsp48e1_presub
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Add support for subtract in preadder
2026-02-11 08:02:18 -08:00
Gus Smith
8ab105ac28
Merge pull request #4303 from Coloquinte/sat_choice
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Infrastructure to run a Sat solver as a command
2026-02-11 06:54:53 -08:00
Gus Smith
b04948a8cd
Simplify test
2026-02-09 09:38:45 -08:00
tondapusili
6bb43f109c
fixed edge cases in negopt passes, fixed cell naming inconsistencies
2026-02-06 16:38:55 -08:00
Robert O'Callahan
34f8582725
Sanitize ABC global and per-run temporary directory names in logs
2026-02-07 12:12:13 +13:00
tondapusili
d592f312ab
mux_push implementation
2026-02-05 16:49:59 -08:00
Akash Levy
5f7658ca7c
Merge branch 'YosysHQ:main' into main
2026-02-05 13:10:34 -08:00
Emil J
1717fa0180
Merge pull request #5663 from YosysHQ/emil/opt_expr-fix-pow-shift
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opt_expr: fix const lhs of $pow to $shl
2026-02-05 13:09:01 +01:00
Akash Levy
715e062bcd
Merge branch 'main' into negopt-pass-pr
2026-02-04 00:15:53 -08:00
tondapusili
643427d9c9
Add negopt pass with comprehensive pattern matching
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This commit introduces the negopt pass with pre/post optimization modes
for handling negation patterns in arithmetic circuits.
Pre-optimization patterns (expose for tree balancing):
- manual2sub: (a + ~b) + 1 → a - b
- sub2neg: a - b → a + (-b)
- negexpand: -(a + b) → (-a) + (-b) [with output width fix]
- negneg: -(-a) → a
- negmux: -(s ? a : b) → s ? (-a) : (-b)
Post-optimization patterns (cleanup/rebuild):
- negrebuild: (-a) + (-b) → -(a + b)
- muxneg: s ? (-a) : (-b) → -(s ? a : b)
- neg2sub: a + (-b) → a - b
All patterns use nusers() for fanout checking (standard Yosys style).
Comprehensive test coverage with positive/negative cases and formal
verification via equiv_opt.
2026-02-03 17:21:21 -08:00
Gus Smith
3f01d7a33a
Add test
2026-02-03 14:41:08 -08:00
Emil J. Tywoniak
91b226b4d4
specify: fix test
2026-02-03 18:40:32 +01:00
Emil J. Tywoniak
c768e55983
ice40: fix dsp_const test
2026-02-03 18:10:29 +01:00
Emil J. Tywoniak
2efd0247a1
opt_hier: fix test
2026-02-03 18:10:29 +01:00
Akash Levy
8e5d24aa6b
Bump yosys to latest
2026-02-03 06:08:36 -08:00
Emil J. Tywoniak
3bfeaee8ca
opt_expr: fix const lhs of $pow to $shl
2026-02-03 11:59:00 +01:00
Emil J
59653da599
Merge pull request #5609 from nataliakokoromyti/upstream-design-run-pass
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Add Design::run_pass()
2026-02-02 19:30:18 +01:00
Akash Levy
a9cf998f9f
Merge from upstream
2026-01-29 17:46:44 -08:00
Natalia
61b1c3c75a
use run_pass in ecp5 add/sub test
2026-01-29 02:42:23 -08:00
