1215 commits

Author	SHA1	Message	Date
David Shah	22c967e35e	ast: Add support for $sformatf system function ... Signed-off-by: David Shah <dave@ds0.me>	2020-01-19 21:20:17 +00:00
Eddie Hung	6a163b5ddd	xilinx_dsp: another typo; move xilinx specific test	2020-01-17 17:07:03 -08:00
Eddie Hung	db68e4c2a7	ice40_dsp: fix typo	2020-01-17 16:08:04 -08:00
Eddie Hung	5507c328ff	Add #1644 testcase	2020-01-17 15:57:52 -08:00
Eddie Hung	ad6c49fff1	ice40_dsp: add test	2020-01-17 15:38:26 -08:00
Jeff Wang	8ef5c7d48c	scoped enum tests	2020-01-16 18:13:30 -05:00
Jeff Wang	caf35896da	enum in package test	2020-01-16 18:09:03 -05:00
Jeff Wang	febe7706a2	simple enum test	2020-01-16 18:09:03 -05:00
Eddie Hung	2245afa142	More rigorous test	2020-01-16 09:15:42 -08:00
Eddie Hung	03ce2c72bb	Merge remote-tracking branch 'origin/master' into eddie/abc9_refactor	2020-01-15 16:42:16 -08:00
Eddie Hung	5918ede9bd	abc9: aAdd test to check $_NOT_s are absorbed	2020-01-15 14:36:05 -08:00
Eddie Hung	e30b6bbbf8	clk2fflogic: work for bit-level $_DFF_* and $_DFFSR_*	2020-01-15 09:51:31 -08:00
Eddie Hung	53a99ade9c	Merge remote-tracking branch 'origin/master' into eddie/abc9_refactor	2020-01-14 11:46:56 -08:00
Eddie Hung	61ffd2d199	Merge pull request #1633 from YosysHQ/eddie/fix_autoname ... autoname: do not rename ports	2020-01-14 11:40:54 -08:00
Eddie Hung	9fa0e03cc9	Merge pull request #1632 from YosysHQ/eddie/fix1630 ... read_aiger: uniquify wires with $aiger<autoidx> prefix	2020-01-14 11:40:40 -08:00
Miodrag Milanović	9fbeb57bbd	Merge pull request #1623 from YosysHQ/mmicko/edif_attr ... Export wire properties in EDIF	2020-01-14 19:19:32 +01:00
Eddie Hung	00964e999d	autoname: add testcase with $-prefix-ed port	2020-01-14 10:13:03 -08:00
Eddie Hung	565d349dc9	Add #1630 testcase	2020-01-13 21:27:53 -08:00
Eddie Hung	a6d4ea7463	abc9: respect (* keep *) on cells	2020-01-13 19:21:11 -08:00
Eddie Hung	9ec948f396	write_xaiger: add support and test for (* keep *) on wires	2020-01-13 19:07:55 -08:00
Eddie Hung	ca2f3db53f	Merge pull request #1620 from YosysHQ/eddie/abc9_scratchpad ... abc9: add some scripts/options into "scratchpad"	2020-01-13 09:04:20 -08:00
Eddie Hung	ae619ba87a	Add #1626 testcase	2020-01-12 15:21:26 -08:00
Eddie Hung	c063436eea	Merge remote-tracking branch 'origin/master' into eddie/abc9_scratchpad	2020-01-11 17:02:20 -08:00
Miodrag Milanovic	ccfe1e5909	this one is fine	2020-01-10 15:20:50 +01:00
Miodrag Milanovic	af852a0ea8	Fix tests	2020-01-10 14:48:01 +01:00
Eddie Hung	a10016ccc5	Add abc9 sanity test	2020-01-09 18:17:06 -08:00
Eddie Hung	94ab3791ce	Merge remote-tracking branch 'origin/master' into eddie/abc9_mfs	2020-01-07 15:44:18 -08:00
Eddie Hung	0d3f10d3cc	Add testcases	2020-01-07 11:44:20 -08:00
Eddie Hung	7c878bf397	tests/aiger: write Yosys output	2020-01-07 11:44:03 -08:00
Eddie Hung	3df869cc7c	Add testcase from #1459	2020-01-06 16:22:22 -08:00
Eddie Hung	6e866030c2	Combine tests to check multiple clock domains	2020-01-02 14:38:59 -08:00
Eddie Hung	b454735bea	Merge remote-tracking branch 'origin/master' into xaig_dff	2020-01-02 12:44:06 -08:00
Eddie Hung	9e5ff30d05	Merge pull request #1606 from YosysHQ/eddie/improve_tests ... Fix a few issues in tests/arch/*	2020-01-01 13:31:46 -08:00
Eddie Hung	52fe1e0c44	Revert insertion of 'reg', leave note behind	2020-01-01 09:05:46 -08:00
Miodrag Milanovic	a1344ec06e	Added a test case	2020-01-01 16:24:30 +01:00
Eddie Hung	713484fa66	Do not do call equiv_opt when no sim model exists	2019-12-31 18:40:30 -08:00
Eddie Hung	a59016b146	Fix warnings	2019-12-31 18:40:11 -08:00
Eddie Hung	c082329af3	Call equiv_opt with -multiclock and -assert	2019-12-31 18:39:32 -08:00
Eddie Hung	ccc0a740d2	Add some abc9 dff tests	2019-12-31 16:16:05 -08:00
Eddie Hung	0c4be94a02	Add -D DFF_MODE to abc9_map test	2019-12-30 20:13:25 -08:00
Eddie Hung	fc4b8b8991	Remove submod changes	2019-12-30 14:56:14 -08:00
Eddie Hung	405e974fe5	Merge remote-tracking branch 'origin/master' into xaig_dff	2019-12-30 14:31:42 -08:00
Miodrag Milanović	c0a17c2457	Merge pull request #1589 from YosysHQ/iopad_default ... Make iopad option default for all xilinx flows	2019-12-30 20:34:31 +01:00
Eddie Hung	c2c74f9bb0	Merge pull request #1599 from YosysHQ/eddie/retry_1588 ... Retry #1588 -- "write_xaiger: only instantiate each whitebox cell type once"	2019-12-30 10:01:02 -08:00
Miodrag Milanovic	f9749c202c	Fix new tests	2019-12-28 16:43:19 +01:00
Miodrag Milanovic	8c3de1d4bd	Merge remote-tracking branch 'origin/master' into iopad_default	2019-12-28 16:23:31 +01:00
Miodrag Milanovic	a82c701668	Make test without iopads	2019-12-28 16:22:24 +01:00
Miodrag Milanovic	509da7ed1a	Revert "Fix xilinx tests, when iopads are default" ... This reverts commit 477e43d921.	2019-12-28 16:12:45 +01:00
Eddie Hung	011f749ecf	Update resource count	2019-12-28 02:15:11 -08:00
Eddie Hung	d45869855c	Add #1598 testcase	2019-12-27 16:44:57 -08:00