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yosys/tests
2019-12-31 18:39:32 -08:00
..
aiger
arch Call equiv_opt with -multiclock and -assert 2019-12-31 18:39:32 -08:00
asicworld
bram
errors
fsm
hana
liberty
lut
memories
opt opt_share: Fix handling of fine cells. 2019-11-27 08:01:07 +01:00
opt_share
proc proc_clean: fix order of switch insertion. 2019-08-19 16:44:23 +00:00
realmath
rpc rpc: new frontend. 2019-09-30 15:53:11 +00:00
sat Revert "Add test that is expecting to fail" 2019-10-08 12:41:26 -07:00
share
simple Make SV2017 compliant courtesy of @wsnyder 2019-12-12 07:34:07 -08:00
simple_abc9 abc9: Fix breaking of SCCs 2019-12-01 20:44:56 +00:00
smv
sva
svinterfaces
svtypes Use "(id)" instead of "id" for types as temporary hack 2019-10-14 05:24:31 +02:00
techmap iopadmap: Emit tristate buffers with const OE for some edge cases. 2019-12-25 17:37:58 +01:00
tools
unit
various Merge pull request #1569 from YosysHQ/eddie/fix_1531 2019-12-19 12:21:33 -05:00
vloghtb