1998 commits

Author	SHA1	Message	Date
Akash Levy	1242db626f	Merge remote-tracking branch 'upstream/main'	2024-12-12 22:49:19 -08:00
N. Engelhardt	378864d33b	bound attributes: handle vhdl null ranges	2024-12-12 11:42:39 +01:00
Akash Levy	caaef5ac14	Merge branch 'YosysHQ:main' into main	2024-12-11 12:00:34 -08:00
N. Engelhardt	03033ab6d4	add more tests for bounds attributes, fix attributes appearing in verilog	2024-12-11 16:11:02 +01:00
Martin Povišer	4bd6061709	Merge pull request #4799 from povik/wrapcell-unused ... wrapcell: Optionally track unused outputs	2024-12-10 21:16:28 +01:00
Emil J. Tywoniak	55dcf0e200	tests: fix dfflibmap test - false negative conflict multiple -liberty vs enable inference	2024-12-10 15:48:23 +01:00
Martin Povišer	48c8d70a45	wrapcell: Test check -assert post wrapping	2024-12-10 15:13:31 +01:00
Emil J	87736a2bf9	Merge pull request #4807 from YosysHQ/emil/dfflibmap-test-dffe ... dfflibmap: cover enable inference with test	2024-12-10 12:41:11 +01:00
Akash Levy	e0ba08dd1d	Merge branch 'YosysHQ:main' into main	2024-12-09 11:13:47 -08:00
Martin Povišer	b0708a38bf	Merge pull request #4678 from povik/tcl-rtlil-api ... Start Tcl design inspection methods	2024-12-09 15:44:58 +01:00
Emil J. Tywoniak	681b678417	dfflibmap: cover enable inference with test	2024-12-09 14:18:08 +01:00
Akash Levy	8bb193d7c5	Merge branch 'YosysHQ:main' into main	2024-12-08 15:44:46 -08:00
Miodrag Milanovic	05398889ad	Add verific verilog test cases for blackboxes	2024-12-06 16:13:25 +01:00
N. Engelhardt	8b0f665cc5	add setenv pass	2024-12-06 11:25:43 +01:00
Martin Povišer	d57d21e566	wrapcell: Optionally track unused outputs	2024-12-05 18:16:53 +01:00
Akash Levy	4356eae4c9	Yosys sync	2024-12-04 14:16:55 -08:00
Martin Povišer	59a96470df	Merge pull request #4773 from povik/wrapcell ... wrapcell: Add new command	2024-12-04 11:49:51 +01:00
Martin Povišer	14ee5ce800	Merge pull request #4787 from povik/booth-macc ... booth: Map simple `$macc` instances too	2024-12-04 11:49:34 +01:00
Emil J. Tywoniak	6edf9c86cb	libparse: add LibertyMergedCells, enable multiple -liberty args for dfflibmap and clockgate	2024-12-03 17:36:00 +01:00
Emil J	52336369fa	Merge pull request #4783 from YosysHQ/emil/blockrom-driver-conflict ... tests: fix blockrom.v driver conflict	2024-12-03 16:29:43 +01:00
Martin Povišer	109d97bb40	Merge pull request #4706 from povik/keep_hierarchy-adjustalgo ... Adjust `keep_hierarchy` behavior	2024-12-03 12:18:28 +01:00
Akash Levy	3914c21286	verific->import fix for new test case	2024-12-02 20:07:07 -05:00
Martin Povišer	f0704b6ede	Redo integer passing on top of bignum	2024-12-02 19:56:51 +01:00
Emil J. Tywoniak	c26966e3db	tests: fix blockrom.v driver conflict	2024-12-02 16:56:42 +01:00
Emil J. Tywoniak	fe64a714a9	techmap: add a Sklansky option for $lcu mapping	2024-12-02 11:34:58 +01:00
Akash Levy	6e88c689f2	Merge branch 'YosysHQ:main' into main	2024-12-01 12:32:07 -05:00
Martin Povišer	1ded817beb	booth: Map simple $macc instances too	2024-12-01 16:00:04 +01:00
Emil J. Tywoniak	3ebc714dbc	techmap: test consistently with other equiv_make tests	2024-11-29 00:15:02 +01:00
Emil J. Tywoniak	91844968fd	techmap: wrap builtin $lcu as golden module in PPA tests	2024-11-29 00:13:21 +01:00
Emil J. Tywoniak	a41ef0271c	techmap: remove ppa.nomatch by purging internal signals	2024-11-29 00:03:49 +01:00
Emil J. Tywoniak	4bf3677640	techmap: set Han-Carlson adder priority consistent with Kogge-Stone	2024-11-28 23:54:00 +01:00
Emil J. Tywoniak	3f078d9afa	tests: rework Kogge-Stone test consistently with Han-Carlson	2024-11-28 15:33:21 +01:00
Emil J. Tywoniak	1a562f9605	techmap: add TCL test for Han-Carlson adder	2024-11-28 15:33:21 +01:00
Emil J. Tywoniak	289673a807	tests: add support for tcl tests	2024-11-28 15:33:21 +01:00
Martin Povišer	79e9258a31	wrapcell: Add new command	2024-11-27 14:01:00 +01:00
Miodrag Milanović	29e8812bab	Merge pull request #4724 from YosysHQ/micko/blackbox_verific ... verific: fix blackbox regression and add test case	2024-11-25 15:06:54 +01:00
Akash Levy	f855b39dbb	Merge branch 'YosysHQ:main' into main	2024-11-21 00:34:49 -08:00
Emil J	5b6baa3ef1	Merge pull request #4744 from YosysHQ/emil/clockgate-liberty ... clockgate: add -liberty	2024-11-20 15:04:00 +01:00
George Rennie	9043dc0ad6	tests: replace read_ilang with read_rtlil ... * #4612 was written before read_ilang was deprecated but merged after so caused test failures. This switches read_ilang to read_rtlil	2024-11-20 14:54:23 +01:00
Emil J	cc17d5bb70	Merge pull request #4612 from georgerennie/george/opt_demorgan_zero_width ... opt_demorgan: skip zero width cells	2024-11-20 13:33:16 +01:00
Emil J	18459b4b09	Merge pull request #4614 from georgerennie/george/opt_reduce_cell_width ... opt_reduce: keep at least one input to $reduce_or/and cells	2024-11-20 13:33:04 +01:00
Martin Povišer	7ebe451f9a	Merge pull request #4714 from georgerennie/george/proc_dff_bug_multiple_sigs ... proc_dff: fix early return bug	2024-11-20 13:26:32 +01:00
Akash Levy	5eaf627645	Undo Liberty stuff	2024-11-18 17:10:25 -08:00
Akash Levy	1a69c51c88	Merge branch 'YosysHQ:main' into main	2024-11-18 16:10:30 -08:00
Martin Povišer	270846a49a	Merge pull request #4723 from povik/memv2-nordports ... rtlil: Adjust internal check for `$mem_v2` cells	2024-11-18 15:44:39 +01:00
Emil J. Tywoniak	a5bc36f77e	clockgate: add -dont_use	2024-11-18 13:45:30 +01:00
Emil J. Tywoniak	b08441d95c	clockgate: shuffle test liberty to exercise comparison better	2024-11-18 12:48:50 +01:00
Emil J. Tywoniak	1e3f8cc630	clockgate: add test liberty file	2024-11-18 12:45:27 +01:00
Emil J. Tywoniak	c921d85a85	clockgate: fix test comments	2024-11-18 12:33:09 +01:00
Akash Levy	3190771892	Small fixes to get a test working	2024-11-16 22:21:58 -08:00