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Merge pull request #4723 from povik/memv2-nordports
rtlil: Adjust internal check for `$mem_v2` cells
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commit
270846a49a
2 changed files with 12 additions and 3 deletions
9
tests/memories/nordports.ys
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9
tests/memories/nordports.ys
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# check memory_collect doesn't produce invalid RTLIL on a memory w/o read ports
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read_rtlil <<EOF
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autoidx 1
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attribute \top 1
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module \top
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memory width 4 size 3 \foo
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end
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EOF
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memory_collect
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