207 commits

Author	SHA1	Message	Date
Clifford Wolf	f4b46ed31e	Replaced signed_parameters API with CONST_FLAG_SIGNED	2013-12-04 14:24:44 +01:00
Clifford Wolf	93a70959f3	Replaced RTLIL::Const::str with generic decoder method	2013-12-04 14:14:05 +01:00
Clifford Wolf	6e227e3666	Fixed submod for non-primitive cells	2013-12-02 12:53:55 +01:00
Clifford Wolf	e881878341	Fixed submod for non-cleaned designs	2013-12-02 12:18:07 +01:00
Clifford Wolf	97efc2ed5f	A fix in memory_dff for write ports with static addresses	2013-12-01 14:08:18 +01:00
Clifford Wolf	7295b25955	Progress on AppNote 011	2013-11-29 16:42:49 +01:00
Clifford Wolf	c60aaf8fa3	Added pattern support to "ls" command	2013-11-28 21:34:41 +01:00
Clifford Wolf	293356e87c	Improved ID matching scheme in select (and thus for all commands)	2013-11-28 21:13:16 +01:00
Clifford Wolf	792bbad448	Fixes and improvements in "show" command	2013-11-28 21:02:19 +01:00
Clifford Wolf	0e52f3fa01	Added "src" attribute to processes	2013-11-28 17:37:50 +01:00
Clifford Wolf	5af7f4db72	Added support for "show -pause" and "show -format dot"	2013-11-28 13:35:28 +01:00
Clifford Wolf	38e7fa6530	Tighter integration of ABC build	2013-11-27 09:08:35 +01:00
Clifford Wolf	bc3cc88719	Started implementing undef support in "sat" command	2013-11-25 21:40:00 +01:00
Clifford Wolf	3d95047ce2	Bugfixes in new "stat" command	2013-11-25 21:08:34 +01:00
Clifford Wolf	4c7d6e63ec	Added "stat" command	2013-11-25 20:43:57 +01:00
Clifford Wolf	61412d167f	Improvements in satgen undef handling	2013-11-25 16:50:45 +01:00
Clifford Wolf	bd65e67d8a	Improvements in satgen undef handling	2013-11-25 15:12:01 +01:00
Clifford Wolf	8c3f4b3957	Started implementing undef handling in satgen	2013-11-25 04:51:33 +01:00
Clifford Wolf	76f7c10cfc	Using simplemap mappers from techmap	2013-11-24 23:31:14 +01:00
Clifford Wolf	3ee33cbdaf	Added simplemap pass	2013-11-24 22:52:30 +01:00
Clifford Wolf	8dafecd34d	Added module->avail_parameters (for advanced techmap features)	2013-11-24 20:29:07 +01:00
Clifford Wolf	4011d47646	Added techmap -D and -I options	2013-11-24 20:04:48 +01:00
Clifford Wolf	20175afd29	Added "techmap -share_map" option	2013-11-24 19:50:25 +01:00
Clifford Wolf	f71e27dbf1	Remove auto_wire framework (smarter than the verilog standard)	2013-11-24 17:29:11 +01:00
Clifford Wolf	609caa23b5	Implemented correct handling of signed module parameters	2013-11-24 17:17:21 +01:00
Clifford Wolf	72b35e0b99	Fixed "flatten" top-module detection: Only use on fully selected designs	2013-11-24 14:10:46 +01:00
Clifford Wolf	28093d9dd2	Added "top" attribute to mark top module in hierarchy	2013-11-24 05:03:43 +01:00
Clifford Wolf	5f9c7fc6ea	Improved handling of techmap special wires	2013-11-23 16:49:58 +01:00
Clifford Wolf	532091afcb	Added more generic _TECHMAP_ wire mechanism to techmap pass	2013-11-23 15:58:06 +01:00
Clifford Wolf	295e352ba6	Renamed "placeholder" to "blackbox"	2013-11-22 15:01:12 +01:00
Clifford Wolf	1c4a6411af	Updated abc	2013-11-21 22:39:10 +01:00
Clifford Wolf	09471846c5	Major improvements in mem2reg and added "init" sync rules	2013-11-21 13:49:00 +01:00
Clifford Wolf	84ced2bb8e	Fixed a bug in "add -global_input"	2013-11-21 03:01:20 +01:00
Clifford Wolf	64a5f8f75e	Added "proc_arst -global_arst" feature	2013-11-20 21:00:43 +01:00
Clifford Wolf	2279b2a196	Added "add" command (only wires for now)	2013-11-20 19:37:40 +01:00
Clifford Wolf	63285b300c	Renamed temp module generated by "abc" pass from "logic" to "netlist"	2013-11-19 01:03:57 +01:00
Clifford Wolf	a694324a75	Fixed abc pass blif parser for constant bits	2013-11-13 15:46:28 +01:00
Clifford Wolf	e5b974fa2a	Cleanups and bugfixes in response to new internal cell checker	2013-11-11 00:39:45 +01:00
Clifford Wolf	378cc509cd	Call internal checker more often	2013-11-10 23:24:21 +01:00
Clifford Wolf	223892ac28	Improved user-friendliness of "sat" and "eval" expression parsing	2013-11-09 12:02:27 +01:00
Clifford Wolf	18f9477e95	Added verification of SAT model to "eval -vloghammer_report" command	2013-11-09 11:38:17 +01:00
Clifford Wolf	b04051a0e2	Fixed keep attribute on wires in opt_clean	2013-11-08 05:20:15 +01:00
Clifford Wolf	947bd9b96b	Renamed extend_un0() to extend_u0() and use it in genrtlil	2013-11-07 18:17:10 +01:00
Clifford Wolf	0e1661f84e	Fixed type of sign extension in opt_const $eq/$ne handling	2013-11-07 16:53:28 +01:00
Clifford Wolf	db42a8f89b	Fixed $eq/$ne bitwise optimization in opt_const	2013-11-07 11:54:59 +01:00
Clifford Wolf	f485962c5e	Added handling of unconnected/unspecified signals to eval -vloghammer_report	2013-11-06 22:42:07 +01:00
Clifford Wolf	031a91dc94	Added correct RTL undef handling to eval vloghammer mode	2013-11-06 13:16:47 +01:00
Clifford Wolf	f94266bb42	Added eval -vloghammer_report mode	2013-11-06 04:14:56 +01:00
Clifford Wolf	1d34fd7608	Added support for "keep" attributes on wires	2013-11-05 15:52:29 +01:00
Clifford Wolf	eab536a203	Merge branch 'master' of github.com:cliffordwolf/yosys	2013-11-03 21:13:21 +01:00