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Improvements in satgen undef handling
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parent
11e8118589
commit
bd65e67d8a
2 changed files with 142 additions and 31 deletions
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@ -191,11 +191,27 @@ struct VlogHammerReporter
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if (expected_bit == RTLIL::State::Sx)
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continue;
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}
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if (solution_bit != expected_bit)
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log_error("Found error in SAT model: y[%d] = %s, should be %s.\n",
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int(i), log_signal(solution_bit), log_signal(expected_bit));
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if (solution_bit != expected_bit) {
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std::string sat_bits, rtl_bits;
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for (int k = expected_y.width-1; k >= 0; k--) {
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if (model_undef && y_values.at(expected_y.width+k))
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sat_bits += "x";
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else
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sat_bits += y_values.at(k) ? "1" : "0";
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rtl_bits += expected_y.chunks.at(k).data.bits.at(0) == RTLIL::State::Sx ? "x" :
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expected_y.chunks.at(k).data.bits.at(0) == RTLIL::State::S1 ? "1" : "0";
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}
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log_error("Found error in SAT model: y[%d] = %s, should be %s:\n SAT: %s\n RTL: %s\n %*s^\n",
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int(i), log_signal(solution_bit), log_signal(expected_bit),
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sat_bits.c_str(), rtl_bits.c_str(), expected_y.width-i-1, "");
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}
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}
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ez.assume(ez.vec_ne(y_vec, ez.vec_const(y_values)));
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if (ez.solve(y_vec, y_values))
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log_error("Found two distinct solutions to SAT problem.\n");
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log(" SAT model verified.\n");
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}
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@ -251,7 +267,7 @@ struct VlogHammerReporter
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rtl_sig = sig;
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rtl_sig.expand();
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sat_check(module, recorded_set_vars, recorded_set_vals, sig, false);
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// sat_check(module, recorded_set_vars, recorded_set_vals, sig, true);
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sat_check(module, recorded_set_vars, recorded_set_vals, sig, true);
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} else if (rtl_sig.width > 0) {
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sig.expand();
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if (rtl_sig.width != sig.width)
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