Emil J
468ba27d91
Merge pull request #6078 from YosysHQ/emil/hierarchy-fix-keep-cache
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hierarchy: fix keep cache usage by caching false too
2026-08-03 15:54:50 +00:00
Emil J. Tywoniak
ae14b5e6a8
hierarchy: fix cache usage by caching false too
2026-08-03 14:55:03 +02:00
nella
abe32c86a0
Merge 'origin/main' into emil/muxpack-fix-chain.
2026-08-03 11:50:21 +02:00
Krystine Sherwin
2f8cf84882
alumacc: cmp_mergeable function
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Replace all the existing mergeable checks with a call to a single function.
Fix remaining discrepencies (undersized output and mismatched signed inputs).
2026-07-31 16:59:57 +12:00
Krystine Sherwin
bb49b0be32
alumacc: Fix get_lt for oversized output
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Current behavior uses the output width to determine the MSb(s), however this is not correct if the output is larger than the inputs (which doesn't happen when creating an `$alu` for a compare op, but does when folding a compare op into an arithmetic `$alu`).
Co-authored-by: Lofty <dan.ravensloft@gmail.com>
2026-07-31 16:59:56 +12:00
Emil J
c03bbc3309
Merge pull request #6069 from YosysHQ/emil/liberty-flop-fix-polarity
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read_liberty: fix set&reset polarity
2026-07-30 15:34:24 +00:00
Emil J. Tywoniak
5f5f8b99b1
liberty: cleanup
2026-07-30 16:44:12 +02:00
Emil J
07a615a283
Merge pull request #6068 from YosysHQ/emil/aigmap-remove-unused-cache
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aigmap: remove unused and_cache
2026-07-27 20:40:51 +00:00
Emil J. Tywoniak
82914a0204
dfflibmap: error on wide registers in design
2026-07-27 22:24:28 +02:00
Emil J. Tywoniak
6585661740
aigmap: remove unused and_cache
2026-07-27 16:50:38 +02:00
Emil J
5d2fbf8187
Merge pull request #5961 from YosysHQ/emil/opt_muxtree-fix-reconvergence
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opt_muxtree: fix reconvergence
2026-07-27 09:08:13 +00:00
Lofty
f0b5225134
flowmap: remove
2026-07-22 13:50:33 +01:00
Lofty
45e1de36b4
abc: remove -fast (again)
2026-07-21 09:50:14 +01:00
Miodrag Milanović
e2c27aaafa
Merge pull request #6042 from YosysHQ/krys/symfpu
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Add `symfpu` pass
2026-07-20 10:20:23 +00:00
Miodrag Milanovic
a7cfabd405
Fix gcc compile errors
2026-07-20 10:29:41 +02:00
Krystine Sherwin
c2237447bf
symfpu: Drop libs/ from symfpu includes
2026-07-20 09:58:04 +12:00
Emil J. Tywoniak
8565451ef9
autoname: selection determines what gets renamed, not the name it gets renamed to
2026-07-17 22:48:46 +02:00
Emil J. Tywoniak
fb0bb160ad
autoname: rewrite
2026-07-17 12:02:43 +02:00
Krystine Sherwin
9dd5c3a6a4
symfpu: Run pre-commit
2026-07-15 14:56:11 +12:00
Krystine Sherwin
c3043b1ce5
symfpu: whitespace
2026-07-15 14:50:33 +12:00
Krystine Sherwin
d5b6a38f65
symfpu: Missed a space
2026-07-15 14:50:32 +12:00
Krystine Sherwin
7b5d334603
symfpu_convert: Handle signed ints
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Use input wire `is_signed` to select between signed and unsigned handling.
2026-07-15 14:50:32 +12:00
Krystine Sherwin
50c4a057b2
symfpu: Use ubv for convert flags
2026-07-15 14:50:31 +12:00
Krystine Sherwin
675087937f
symfpu: Convert with flags
2026-07-15 14:50:31 +12:00
Krystine Sherwin
dfec87e6a3
symfpu: Add symfpu_convert
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Convert one input to three outputs (int -> float, float -> int, float -> float).
No rounding mode, no flags (yet).
2026-07-15 14:50:31 +12:00
Krystine Sherwin
7a6b36b670
symfpu: Add -compare mode
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Also `min` and `max` ops. RISC-V uses IEEE 754-2019 semantics where `min(+0,-0) == -0` and `max(+0,-0) == +0` so we do the same here. We could make it optional, but as I understand it the newer behavior is still backwards compatible (since previously it was valid to have selected either).
2026-07-15 14:50:30 +12:00
Krystine Sherwin
16f6e8dc6a
Add symfpu -classify
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Add description text for standard `symfpu` signature.
2026-07-15 14:50:30 +12:00
Krystine Sherwin
9943484dbc
symfpu: Add altsqrt
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No denormalization here. That can be a problem for later (or not at all).
2026-07-15 14:50:29 +12:00
Krystine Sherwin
91928a7329
symfpu: Add alt2div
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`altdiv` but without denormalization, because as it turns out HardFloat unpacks subnorms in the same way, so lets just support both styles.
2026-07-15 14:50:29 +12:00
Krystine Sherwin
db676a2eae
symfpu: Add altdiv
2026-07-15 14:50:28 +12:00
Krystine Sherwin
717f7c5d3a
symfpu: Dynamic rounding mode
2026-07-15 14:50:27 +12:00
Krystine Sherwin
56e61ee839
symfpu: Tidying output
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Also switching to cleaner library branch
2026-07-15 14:50:26 +12:00
Krystine Sherwin
2dcaa944bf
symfpu: floatWithStatusFlags
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Now with verified muladd exceptions.
2026-07-15 14:50:26 +12:00
Krystine Sherwin
2b39569477
symfpu: Configurable rounding modes
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Including tests, but currently only testing rounding modes on multiply.
Also missing the ...01 case.
2026-07-15 14:50:25 +12:00
Krystine Sherwin
1347790f4d
symfpu: Add flags
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Use symfpu fork.
Add tests for symfpu properties and extra edge case checking for flags.
2026-07-15 14:50:25 +12:00
Krystine Sherwin
625aecb5d3
symfpu: Configurable op
2026-07-15 14:50:07 +12:00
Krystine Sherwin
648fb01ffc
symfpu: Configurable eb and sb
2026-07-15 14:50:06 +12:00
Jannis Harder
0ef11ee048
wip: symfpu pass
2026-07-15 14:50:06 +12:00
Emil J. Tywoniak
332ea782eb
dfflibmap: fix resetval clobber
2026-07-14 15:01:31 +02:00
nella
68aaa34975
Reformat scl cache.
2026-07-10 14:51:58 +02:00
nella
b678c238e4
Include build datetime in scl cache hash.
2026-07-10 12:44:34 +02:00
Lofty
75286287c6
Merge pull request #5973 from YosysHQ/lofty/abc-refactor-7
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Move rename logic to abc_ops_reintegrate
2026-07-09 08:46:46 +00:00
Krystine Sherwin
a9d25ab808
Docs: Minor tidying
2026-07-09 15:50:58 +12:00
nella
8dc32cbf4e
Merge pull request #6012 from YosysHQ/nella/fix-opt-reduce
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`opt_reduce`: restore pmux b-slice == a elim
2026-07-08 13:36:04 +00:00
nella
f6d810acf9
Restore pmux elim.
2026-07-08 11:58:30 +02:00
nella
f5809a7c2c
Merge branch 'main' into nella/latch-toggle
2026-07-08 11:41:08 +02:00
Miodrag Milanovic
8ad4ffcdd1
Cleanup
2026-07-08 08:34:01 +02:00
nella
006cbc8f72
Merge pull request #5842 from YosysHQ/nella/opt_dff_elim_improvements
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opt_dff: Eliminate equivalent bits
2026-07-06 12:02:50 +00:00
nella
0e56ca02ed
Make opt_dff -sat conflict with -keepdc.
2026-07-06 13:47:10 +02:00
nella
a3b8609c84
Add -nolatches check option.
2026-06-24 10:38:10 +02:00
