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Make attrmap able to alter memory attributes as well
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parent
3ef4c91c31
commit
784de0f6e3
1 changed files with 5 additions and 12 deletions
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@ -270,26 +270,19 @@ struct AttrmapPass : public Pass {
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{
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for (auto module : design->selected_modules())
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{
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for (auto wire : module->selected_wires())
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for (auto wire : module->selected_members())
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attrmap_apply(stringf("%s.%s", log_id(module), log_id(wire)), actions, wire->attributes);
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for (auto cell : module->selected_cells())
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attrmap_apply(stringf("%s.%s", log_id(module), log_id(cell)), actions, cell->attributes);
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for (auto proc : module->processes)
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for (auto proc : module->selected_processes())
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{
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if (!design->selected(module, proc.second))
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continue;
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attrmap_apply(stringf("%s.%s", log_id(module), log_id(proc.first)), actions, proc.second->attributes);
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std::vector<RTLIL::CaseRule*> all_cases = {&proc.second->root_case};
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std::vector<RTLIL::CaseRule*> all_cases = {&proc->root_case};
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while (!all_cases.empty()) {
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RTLIL::CaseRule *cs = all_cases.back();
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all_cases.pop_back();
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attrmap_apply(stringf("%s.%s (case)", log_id(module), log_id(proc.first)), actions, cs->attributes);
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attrmap_apply(stringf("%s.%s (case)", log_id(module), log_id(proc)), actions, cs->attributes);
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for (auto &sw : cs->switches) {
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attrmap_apply(stringf("%s.%s (switch)", log_id(module), log_id(proc.first)), actions, sw->attributes);
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attrmap_apply(stringf("%s.%s (switch)", log_id(module), log_id(proc)), actions, sw->attributes);
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all_cases.insert(all_cases.end(), sw->cases.begin(), sw->cases.end());
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}
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}
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