Akash Levy
57bf3a6f51
Merge branch 'YosysHQ:main' into main
2025-01-14 08:38:59 -08:00
Emil J. Tywoniak
a58481e9b7
mark all hash_into methods nodiscard
2025-01-14 12:39:15 +01:00
Akash Levy
1dcf75d175
Sync
2024-12-19 21:40:30 -08:00
Emil J. Tywoniak
b9b9515bb0
hashlib: hash_eat -> hash_into
2024-12-18 15:09:25 +01:00
Emil J. Tywoniak
4e29ec1854
hashlib: acc -> eat
2024-12-18 15:09:25 +01:00
Emil J. Tywoniak
d071489ab1
hashlib: redo interface for flexibility
2024-12-18 14:49:25 +01:00
Akash Levy
1eee11846e
Resolve reg naming to some extent
2024-12-17 12:11:39 -08:00
Akash Levy
1242db626f
Merge remote-tracking branch 'upstream/main'
2024-12-12 22:49:19 -08:00
N. Engelhardt
378864d33b
bound attributes: handle vhdl null ranges
2024-12-12 11:42:39 +01:00
Akash Levy
caaef5ac14
Merge branch 'YosysHQ:main' into main
2024-12-11 12:00:34 -08:00
N. Engelhardt
03033ab6d4
add more tests for bounds attributes, fix attributes appearing in verilog
2024-12-11 16:11:02 +01:00
Martin Povišer
ea38fcca5e
Merge pull request #4737 from povik/abc_new-design-boxes
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Support `abc9_box` on ordinary modules in abc_new
2024-12-10 20:07:56 +01:00
Martin Povišer
e9c7967d1e
Merge pull request #4804 from povik/read_liberty-comb-cells
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read_liberty: Revisit for abc9 whiteboxes
2024-12-10 17:50:21 +01:00
Martin Povišer
6b343c2600
aiger2: Clean debug print
2024-12-10 14:27:55 +01:00
Akash Levy
e0ba08dd1d
Merge branch 'YosysHQ:main' into main
2024-12-09 11:13:47 -08:00
Martin Povišer
a353b8fff0
read_liberty: Directly set abc9_box
on fitting cells
2024-12-09 15:43:41 +01:00
Miodrag Milanovic
7d4aff618f
verific: Disable module existence check during static elaboration
2024-12-06 15:59:09 +01:00
Akash Levy
c720175c73
Merge branch 'YosysHQ:main' into main
2024-12-05 13:54:47 -08:00
Martin Povišer
cf0a583f40
read_xaiger2: Rm debug print
2024-12-05 18:33:20 +01:00
Martin Povišer
5dffdd229c
read_liberty: Redo unit delay; add simple_comb_cell
attr
2024-12-05 18:31:24 +01:00
Akash Levy
4356eae4c9
Yosys sync
2024-12-04 14:16:55 -08:00
KrystalDelusion
c96d02b204
Merge pull request #4784 from YosysHQ/krys/reduce_warnings
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Reduce number of warnings
2024-12-05 09:16:06 +13:00
Akash Levy
7847b1b2eb
Merge pull request #30 from alaindargelas/macro_power
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Simulation information for macro power
2024-12-04 10:01:04 -08:00
Alain Dargelas
350b04daa3
Ignore unused modules
2024-12-03 13:00:14 -08:00
Krystine Sherwin
e634e9c26b
aiger2: Resolve warnings
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- Remove unused statics CONST_FALSE and CONST_TRUE (which appear to have been folded into the `Index` declaration as CFALSE and CTRUE).
- Assign default value of EMPTY_LIT to `a` and `b` for comparison ops.
- Tag debug only variables with YS_MAYBE_UNUSED, don't assign unused variables (but continue to call the function because it moves the file pointer).
2024-12-03 14:01:57 +13:00
Akash Levy
e0cef06b52
Merge branch 'YosysHQ:main' into main
2024-12-02 19:39:14 -05:00
Miodrag Milanovic
912b38eedb
verific: Handle crash when using empty box option
2024-12-02 15:45:12 +01:00
Akash Levy
ead4b34c3c
Add stack include to decorate_loops.h
2024-12-01 16:50:51 -05:00
Akash Levy
620bf51c50
Merge pull request #29 from alaindargelas/loop_info_3
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Selective boolopt
2024-12-01 12:36:09 -05:00
Akash Levy
6e88c689f2
Merge branch 'YosysHQ:main' into main
2024-12-01 12:32:07 -05:00
Krystine Sherwin
1de5d98ae2
Reduce comparisons of size_t and int
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`Const::size()` returns int, so change iterators that use it to `auto` instead of `size_t`.
For cases where size is being explicitly cast to `int`, use the wrapper that we already have instead: `Yosys::GetSize()`.
2024-11-29 12:53:29 +13:00
Martin Povišer
3bab837bc9
Merge pull request #4765 from georgerennie/george/rtlil_case_rule
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read_rtlil: Warn on assigns after switches in case rules
2024-11-28 00:01:21 +01:00
Alain Dargelas
c32d0a412c
Selective boolopt
2024-11-25 15:08:42 -08:00
Miodrag Milanović
29e8812bab
Merge pull request #4724 from YosysHQ/micko/blackbox_verific
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verific: fix blackbox regression and add test case
2024-11-25 15:06:54 +01:00
Akash Levy
c3d6821f7d
Removing compiler warnings and errors
2024-11-22 20:04:39 -08:00
George Rennie
4a057b3c44
read_rtlil: warn on assigns after switches in case rules
2024-11-21 22:41:13 +01:00
Alain Dargelas
97f5ef2056
indent
2024-11-21 11:31:36 -08:00
Alain Dargelas
dc9d61ed61
Loop info
2024-11-21 11:24:00 -08:00
Alain Dargelas
179bd25235
Loop info
2024-11-21 11:23:13 -08:00
Alain Dargelas
dde6a8d8f1
Loop info
2024-11-21 11:20:40 -08:00
Miodrag Milanovic
d6bd521487
verific : VHDL assert DFF initial value set on Verific library patch side
2024-11-21 13:43:26 +01:00
Akash Levy
bbbc292209
Smallfixes
2024-11-20 21:10:58 -08:00
Akash Levy
6a7e2d2572
Beginnings of UPF support
2024-11-20 20:36:29 -08:00
Akash Levy
2b39770f57
Update flags to be better
2024-11-20 20:36:12 -08:00
Akash Levy
06c87f6a2d
Smallfix
2024-11-19 17:42:36 -08:00
Akash Levy
5eaf627645
Undo Liberty stuff
2024-11-18 17:10:25 -08:00
Akash Levy
1a69c51c88
Merge branch 'YosysHQ:main' into main
2024-11-18 16:10:30 -08:00
Martin Povišer
1cb5fd08b7
Merge pull request #4682 from povik/read_liberty-extensions
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read_liberty extensions
2024-11-18 14:42:18 +01:00
Akash Levy
df0ce40841
blif fixes
2024-11-16 21:53:06 -08:00
Akash Levy
6be73e5c2e
Updates
2024-11-15 19:02:06 -08:00