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Merge pull request #30 from alaindargelas/macro_power
Simulation information for macro power
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commit
7847b1b2eb
3 changed files with 8 additions and 1 deletions
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@ -3546,6 +3546,7 @@ struct VerificPass : public Pass {
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// RuntimeFlags::SetVar("veri_break_loops", 0); // SILIMATE: add to avoid breaking loops
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RuntimeFlags::SetVar("veri_optimize_wide_selector", 1); // SILIMATE: add to optimize wide selector
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RuntimeFlags::SetVar("veri_ignore_assertion_statements", 1); // SILIMATE: add to ignore SVA/asserts
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RuntimeFlags::SetVar("verilog_ignore_unnecessary_modules_in_v_files", 1); // SILIMATE: add to ignore unnecessary modules
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#endif
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#ifdef VERIFIC_VHDL_SUPPORT
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RuntimeFlags::SetVar("vhdl_extract_dualport_rams", 0);
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@ -178,7 +178,7 @@ struct ActivityPropPass : public Pass {
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ActivityProp worker(module);
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totalNbBitsWithActivity += worker.getNbBitsWithActivity();
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}
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log("Collected %d bits with activity", totalNbBitsWithActivity);
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log("Collected %d bits with activity\n", totalNbBitsWithActivity);
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log_flush();
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}
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} ActivityPropPass;
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@ -28,6 +28,8 @@
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#include "kernel/fmt.h"
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#include <ctime>
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#include <sstream>
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#include <iomanip>
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USING_YOSYS_NAMESPACE
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PRIVATE_NAMESPACE_BEGIN
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@ -2541,6 +2543,10 @@ struct AnnotateActivity : public OutputWriter {
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double clk_period = real_timescale * (double)max_time / (clktoggleCounts[0] / 2.0);
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double frequency = 1.0 / clk_period;
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worker->top->module->set_string_attribute("$FREQUENCY", std::to_string(frequency));
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worker->top->module->set_string_attribute("$DURATION", std::to_string(max_time));
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std::stringstream ss;
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ss << std::setprecision(4) << real_timescale;
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worker->top->module->set_string_attribute("$TIMESCALE", ss.str());
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if (debug) {
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std::cout << "Clock toggle count: " << clktoggleCounts[0] << "\n";
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std::cout << "Max time: " << max_time << "\n";
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