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719 commits

Author SHA1 Message Date
Akash Levy
86d67b47a4
Merge branch 'YosysHQ:main' into main 2025-03-08 15:11:04 -08:00
Emil J
8bb24badf2
Merge pull request #4895 from YosysHQ/emil/fix-share-portbit-infinite-loop
share: fix infinite loop in find_terminal_bits on $mux loop
2025-03-08 13:14:11 +01:00
Akash Levy
fa97c4830e Generalize muxadd to muxorder 2025-03-06 16:57:47 -08:00
Akash Levy
881080a827 Merge upstream 2025-03-05 07:54:26 -08:00
Akash Levy
fce2f2676d Rename minor things in opt_share 2025-03-05 06:17:41 -08:00
Akash Levy
7c1cb53c85 Packed muxes have src attr for each constituent mux 2025-03-05 06:09:40 -08:00
Akash Levy
1b1855353d Reduce verbosity of some key things 2025-03-04 22:58:56 -08:00
KrystalDelusion
9106d6b3bd
Merge pull request #4881 from YosysHQ/pmgen-pass-restructure
Move passes out of the passes/pmgen folder
2025-03-01 10:22:54 +13:00
Akash Levy
8bbb7016d4 Remove unnecessary stuff in muxpack 2025-02-23 03:54:11 -08:00
Akash Levy
ef9645990e Reduce pass verbosity 2025-02-18 04:05:40 -08:00
Akash Levy
33c72b0f25
Merge branch 'YosysHQ:main' into main 2025-02-15 15:54:28 -08:00
Akash Levy
fd811ddaee Cleanup 2025-02-14 08:48:27 -08:00
Akash Levy
db83aaee09 Clean up muxpack 2025-02-14 06:56:12 -08:00
Krystine Sherwin
4c728968a3
Fix runtime error on shr INT_MAX 2025-02-14 14:01:36 +13:00
Emil J. Tywoniak
01d2bfcf00 share: fix infinite loop in find_terminal_bits on $mux loop 2025-02-12 10:16:44 +01:00
Krystine Sherwin
0ec5f1b756
pmgen: Move passes out of pmgen folder
- Techlib pmgens are now in relevant techlibs/*.
- `peepopt` pmgens are now in passes/opt.
- `test_pmgen` is still in passes/pmgen.
- Update `Makefile.inc` and `.gitignore` file(s) to match new `*_pm.h` location,
  as well as the `#include`s.
- Change default `%_pm.h` make target to `techlibs/%_pm.h` and move it to the
  top level Makefile.
- Update pmgen target to use `$(notdir $*)` (where `$*` is the part of the file
  name that matched the '%' in the target) instead of `$(subst _pm.h,,$(notdir
  $@))`.
2025-01-31 15:18:28 +13:00
Akash Levy
66186f11fd
Merge branch 'YosysHQ:main' into main 2025-01-30 14:00:19 -08:00
Emil J. Tywoniak
c2691207df wreduce: fix warning for deprecated IdString::in(pool<IdString>) 2025-01-30 12:01:30 +01:00
Akash Levy
07a50e4942 Clean up muxpack one-hot sel 2025-01-24 01:39:41 -08:00
Akash Levy
c42fd5164c wreduce already swaps names no need for any diff 2025-01-16 19:34:41 -08:00
Alain Dargelas
088683048b Muxpack does not need splitfanout 2025-01-16 11:16:03 -08:00
Alain Dargelas
97928493e5 Fix assert 2025-01-14 11:57:03 -08:00
Alain Dargelas
d13c70c3c8 Wire rename 2025-01-14 10:03:54 -08:00
Alain Dargelas
14cfd027b7 opt_balance_tree pass formal equiv 2025-01-14 09:35:43 -08:00
Akash Levy
5c514e00a4 Sync with upstream 2025-01-13 17:20:59 -08:00
Akash Levy
941d78a6ac Make splitnetlist more efficient, no preliminary opt_clean in submod, remove $buf cells in opt_clean 2025-01-10 17:12:15 -08:00
Alain Dargelas
0f9901f128 forgot to recompute chains 2025-01-10 14:51:21 -08:00
Alain Dargelas
2ae521bbd1 Built-in splitfanout in muxpack 2025-01-10 13:55:23 -08:00
Alain Dargelas
99afdfa2bf Merge branch 'main' into make_excl 2025-01-10 13:50:59 -08:00
Martin Povišer
ca0ace66bc
Merge pull request #4817 from povik/macc_v2-1
macc: Stop using the B port
2025-01-08 14:42:51 +01:00
Martin Povišer
366e3f22fb
Merge pull request #4836 from YosysHQ/emil/share-fix-log
share: fix misleading 0 cells log message
2025-01-08 13:14:34 +01:00
Martin Povišer
652a1b9806 macc: Stop using the B port
The B port is for single-bit summands. These can just as well be
represented as an additional summand on the A port (which supports
summands of arbitrary width). An upcoming `$macc_v2` cell won't be
special-casing single-bit summands in any way.

In preparation, make the following changes:

 * remove the `bit_ports` field from the `Macc` helper (instead add any
   single-bit summands to `ports` next to other summands)

 * leave `B` empty on cells emitted from `Macc::to_cell`
2025-01-08 13:03:35 +01:00
Emil J. Tywoniak
1836a571c9 share: fix misleading log message 2025-01-07 19:25:15 +01:00
Akash Levy
443613da69
Merge branch 'YosysHQ:main' into main 2025-01-07 00:56:19 -05:00
Martin Povišer
be351886a5 wreduce: Adjust naming and comments 2025-01-03 12:54:34 +01:00
Alain Dargelas
fad1b285df format 2024-12-30 17:25:06 -08:00
Alain Dargelas
0d5d7809f8 format 2024-12-30 17:24:06 -08:00
Alain Dargelas
11c9331a51 format 2024-12-30 17:23:00 -08:00
Alain Dargelas
163b1653b1 format 2024-12-30 17:17:47 -08:00
Alain Dargelas
af248c3cb2 format 2024-12-30 17:16:47 -08:00
Alain Dargelas
a32a7b27bc format 2024-12-30 17:13:00 -08:00
Alain Dargelas
ad80b5336d format 2024-12-30 17:08:07 -08:00
Alain Dargelas
8d6a542a5d Decode logic for muxpack 2024-12-27 15:23:25 -08:00
Alain Dargelas
ab0058a568 New -limit_fanout option for opt_balance_tree 2024-12-19 11:44:39 -08:00
Akash Levy
27d3f41ea6 Keep track of new cells in opt_dff and don't rename if only one cell is sliced 2024-12-17 14:18:51 -08:00
Akash Levy
2d105fc2c3 Small naming fixes to remove sig_ prefix 2024-12-17 10:48:28 -08:00
Martin Povišer
08778917db wreduce: Optimize signedness when possible 2024-12-16 12:57:08 +01:00
Akash Levy
bfc4ab9138 Fix unordered increment 2024-12-13 13:32:44 -08:00
Alain Dargelas
41c6b71bcb opt_balance_tree allow_off_chain 2024-12-12 09:50:53 -08:00
Akash Levy
2c5811daa1 Fix warnings 2024-12-09 11:45:09 -08:00