George Rennie 8fb3f88842 tests: remove -seq 1 from sat with -tempinduct where possible ... * When used with -tempinduct mode, -seq <N> causes assertions to be ignored in the first N steps. While this has uses for reset modelling, for these test cases it is unnecessary and could lead to failures slipping through uncaught		2025-09-08 18:04:32 +02:00
..
dynamic_part_select
.gitignore	Add a general tests/.gitignore and remove redundant entries in subdirectory .gitignore files.	2025-07-22 10:38:38 +00:00
abc9.v
abc9.ys
abstract_init.ys
abstract_initstates.ys	abstract: Add -initstates option	2025-08-12 15:37:12 +02:00
abstract_state.ys
abstract_value.ys
aiger2.ys
aiger_dff.ys
async.sh
async.v
attrib05_port_conn.v
attrib05_port_conn.ys
attrib07_func_call.v
attrib07_func_call.ys
autoname.ys
blackbox_wb.ys
box_derive.ys
bug1496.ys
bug1531.ys
bug1614.ys
bug1710.ys
bug1745.ys
bug1781.ys
bug1876.ys
bug2014.ys
bug3462.ys
bug3879.ys
bug4082.ys
bug4865.ys
bug4909.ys
cellarray_array_connections.ys
celledges_shift.ys
check.ys
check_2.ys
check_3.ys
check_4.ys
chformal_check.ys
chformal_coverenable.ys
chparam.sh
clk2fflogic_effects.sh
clk2fflogic_effects.sv
const_arg_loop.sv
const_arg_loop.ys	tests: remove -seq 1 from sat with -tempinduct where possible	2025-09-08 18:04:32 +02:00
const_func.sv
const_func.ys	tests: remove -seq 1 from sat with -tempinduct where possible	2025-09-08 18:04:32 +02:00
const_func_block_var.v
const_func_block_var.ys
constant_drive_conflict.ys
constcomment.ys
constmsk_test.v
constmsk_test.ys
constmsk_testmap.v
countbits.sv
countbits.ys	tests: remove -seq 1 from sat with -tempinduct where possible	2025-09-08 18:04:32 +02:00
cutpoint_blackbox.ys
cutpoint_whole.ys
deminout_unused.ys
design.ys
design1.ys
design2.ys
dynamic_part_select.ys
elab_sys_tasks.sv
elab_sys_tasks.ys
equiv_assume.ys	tests: Add equiv_induct to equiv_assume.ys	2025-08-06 15:13:04 +12:00
equiv_make_make_assert.ys
equiv_opt_multiclock.ys
equiv_opt_undef.ys
exec.ys
fib.v
fib.ys
fib_tern.v
fib_tern.ys
formalff_declockgate.ys
func_port_implied_dir.sv
func_port_implied_dir.ys
gen_if_null.v
gen_if_null.ys
global_scope.ys
gzip_verilog.v.gz
gzip_verilog.ys
help.ys
hierarchy.sh
hierarchy_defer.ys
hierarchy_generate.ys
hierarchy_param.ys
ice40_mince_abc9.ys	Add test for abc9+mince issue	2020-03-20 20:35:28 +00:00
integer_range_bad_syntax.ys
integer_real_bad_syntax.ys
json_escape_chars.ys
json_scopeinfo.ys
keep_hierarchy.ys
lcov.gold	print summary of line coverage to log	2025-07-16 13:40:07 +02:00
lcov.v	update test to use suggested selection for assertions	2025-07-01 11:46:27 +02:00
lcov.ys	update test to use suggested selection for assertions	2025-07-01 11:46:27 +02:00
logger_cmd_error.sh
logger_error.ys
logger_fail.sh
logger_nowarning.ys
logger_warn.ys
logger_warning.ys
logic_param_simple.ys
mem2reg.ys
memory_word_as_index.data
memory_word_as_index.v
memory_word_as_index.ys
muxcover.ys
muxpack.v
muxpack.ys
param_struct.ys	tests: remove -seq 1 from sat with -tempinduct where possible	2025-09-08 18:04:32 +02:00
peepopt.ys
peepopt_formal.ys
plugin.cc
plugin.sh
pmgen_reduce.ys
pmux2shiftx.v
pmux2shiftx.ys
port_sign_extend.v
port_sign_extend.ys
primitives.ys
printattr.ys
rand_const.sv
rand_const.ys
reg_wire_error.sv
reg_wire_error.ys
rename_scramble_name.ys
rename_unescape.ys	rename.cc: Fixup ports after -unescape	2025-08-15 10:48:32 +12:00
rename_wire_move_to_cell.ys	rename: add -move-to-cell option in -wire mode	2025-08-13 11:11:52 +02:00
rtlil_signed_attribute.ys
rtlil_z_bits.ys
run-test.sh
scopeinfo.ys
scratchpad.ys
script.ys
setundef.sv
setundef.ys
sformatf.ys
shregmap.v
shregmap.ys
signed.ys
signext.ys
sim_const.ys
specify.v
specify.ys
splitnets.ys
src.ys
sta.ys
stat.ys	updated testcase	2025-08-16 09:32:08 +02:00
stat_area_by_width.lib	removed copyright notice on lib file.	2025-08-16 09:40:03 +02:00
stat_hierarchy.ys	add Testcases	2025-08-13 14:46:01 +02:00
stat_high_level.ys	testcases	2025-08-16 09:40:03 +02:00
stat_high_level2.ys	testcases	2025-08-16 09:40:03 +02:00
struct_access.sv
struct_access.ys
sub.v
submod.ys
submod_extract.ys
sv_defines.ys
sv_defines_dup.ys
sv_defines_mismatch.ys
sv_defines_too_few.ys
sv_implicit_ports.sh
svalways.sh
tcl_apis.tcl
tcl_apis.v
tcl_apis.ys
wrapcell.ys
wreduce.ys
wreduce2.ys
write_gzip.ys
xaiger.ys