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yosys/tests/various
Jannis Harder 86fb2f16f7 bufnorm: Refactor and fix incremental bufNormalize
This fixes some edge cases the previous version didn't handle properly
by simplifying the logic of determining directly driven wires and
representatives to use as buffer inputs.
2025-09-29 08:21:28 +02:00
..
dynamic_part_select Add torture test for (* nowrshmsk *) stride optimization 2024-01-10 20:28:36 +01:00
.gitignore Add a general tests/.gitignore and remove redundant entries in subdirectory .gitignore files. 2025-07-22 10:38:38 +00:00
abc9.v
abc9.ys abc9: uniquify blackboxes like whiteboxes (#2695) 2021-03-29 22:02:06 -07:00
abstract_init.ys abstract: test -slice from:to for -init 2025-02-25 00:22:14 +01:00
abstract_initstates.ys abstract: Add -initstates option 2025-08-12 15:37:12 +02:00
abstract_state.ys abstract: test -slice for all modes, -rtlilslice for -init 2025-02-25 00:18:16 +01:00
abstract_value.ys abstract: test -slice for all modes, -rtlilslice for -init 2025-02-25 00:18:16 +01:00
aiger2.ys kernel: Rewrite bufNormalize 2025-09-17 13:56:46 +02:00
aiger_dff.ys write_aiger: Fix non-$_FF_ FFs 2022-08-18 13:56:22 +02:00
async.sh tests: use /usr/bin/env for bash. 2023-08-12 11:59:39 +10:00
async.v
attrib05_port_conn.v
attrib05_port_conn.ys
attrib07_func_call.v
attrib07_func_call.ys
autoname.ys autoname.ys: Extra check for rename order 2025-09-26 11:36:23 +12:00
blackbox_wb.ys blackbox: Include whiteboxed modules 2021-03-17 13:58:04 +00:00
box_derive.ys box_derive: Tune the test 2024-05-29 20:42:11 +02:00
bufnorm_opt_clean.ys bufnorm: Refactor and fix incremental bufNormalize 2025-09-29 08:21:28 +02:00
bug1496.ys Remove references to ilang 2024-11-05 12:36:31 +13:00
bug1531.ys
bug1614.ys
bug1710.ys
bug1745.ys
bug1781.ys
bug1876.ys
bug2014.ys
bug3462.ys Add test for bug 3462 2022-08-29 10:10:09 +02:00
bug3879.ys extract_fa: Add test case 2025-01-30 18:45:06 +01:00
bug4082.ys rtlil: Add wire deletion test 2024-01-29 11:25:54 +01:00
bug4865.ys ice40_dsp: fix test 2025-03-26 15:13:05 +02:00
bug4909.ys splitcells: add tests 2025-03-10 19:41:22 +02:00
cellarray_array_connections.ys simplify: regression test for AST_CELLARRAY simplification issue 2022-12-07 18:41:55 +01:00
celledges_shift.ys celledges: Add test of shift cells edge data 2024-01-19 11:14:10 +01:00
check.ys check: Extend testing 2024-03-11 10:45:17 +01:00
check_2.ys check: Extend testing 2024-03-11 10:45:17 +01:00
check_3.ys check: Rephrase regex for portability 2024-03-11 10:45:17 +01:00
check_4.ys celledges: Add read ports arst paths 2024-03-11 10:45:17 +01:00
chformal_check.ys chformal: Add -assert2cover option 2025-06-14 10:54:23 +12:00
chformal_coverenable.ys Additional tests for FV $check compatibility 2024-02-02 16:07:10 +01:00
chparam.sh tests: Run async2sync before sat and/or sim to handle $check cells 2024-02-01 16:14:11 +01:00
clk2fflogic_effects.sh clk2fflogic: Fix handling of $check cells 2024-02-14 11:42:27 +01:00
clk2fflogic_effects.sv clk2fflogic: Fix handling of $check cells 2024-02-14 11:42:27 +01:00
const_arg_loop.sv verilog: fix sizing of constant args for tasks/functions 2021-02-21 15:44:43 -05:00
const_arg_loop.ys tests: remove -seq 1 from sat with -tempinduct where possible 2025-09-08 18:04:32 +02:00
const_func.sv verilog: fix sizing of constant args for tasks/functions 2021-02-21 15:44:43 -05:00
const_func.ys tests: remove -seq 1 from sat with -tempinduct where possible 2025-09-08 18:04:32 +02:00
const_func_block_var.v Allow localparams in constant functions 2020-08-20 20:10:24 -04:00
const_func_block_var.ys Allow blocks with declarations within constant functions 2020-07-25 10:16:12 -06:00
constant_drive_conflict.ys check: Also check for conflicts with constant drivers 2023-06-23 18:07:28 +02:00
constcomment.ys
constmsk_test.v
constmsk_test.ys
constmsk_testmap.v
countbits.sv Add tests for $countbits 2021-02-26 12:28:58 -05:00
countbits.ys tests: remove -seq 1 from sat with -tempinduct where possible 2025-09-08 18:04:32 +02:00
cutpoint_blackbox.ys cutpoint_blackbox.ys: Extra edge case 2025-08-06 18:11:35 +12:00
cutpoint_whole.ys cutpoint: Re-add whole module optimization 2025-05-06 09:57:34 +12:00
deminout_unused.ys
design.ys
design1.ys
design2.ys
dynamic_part_select.ys Add torture test for (* nowrshmsk *) stride optimization 2024-01-10 20:28:36 +01:00
elab_sys_tasks.sv
elab_sys_tasks.ys
equiv_assume.ys tests: Add equiv_induct to equiv_assume.ys 2025-08-06 15:13:04 +12:00
equiv_make_make_assert.ys equiv_make: Add -make_assert option 2022-06-24 00:17:02 +01:00
equiv_opt_multiclock.ys
equiv_opt_undef.ys Remove references to ilang 2024-11-05 12:36:31 +13:00
exec.ys
fib.v verilog: improved support for recursive functions 2020-12-31 18:33:59 -07:00
fib.ys verilog: improved support for recursive functions 2020-12-31 18:33:59 -07:00
fib_tern.v verilog: support recursive functions using ternary expressions 2021-02-12 14:43:42 -05:00
fib_tern.ys verilog: support recursive functions using ternary expressions 2021-02-12 14:43:42 -05:00
formalff_declockgate.ys formalff: Fix -declockgate test and missing emit for memories 2025-04-18 18:57:59 +02:00
func_port_implied_dir.sv sv: complete support for implied task/function port directions 2020-12-31 16:17:13 -07:00
func_port_implied_dir.ys sv: complete support for implied task/function port directions 2020-12-31 16:17:13 -07:00
gen_if_null.v verilog: significant block scoping improvements 2021-01-31 09:42:09 -05:00
gen_if_null.ys verilog: significant block scoping improvements 2021-01-31 09:42:09 -05:00
global_scope.ys
gzip_verilog.v.gz
gzip_verilog.ys
help.ys tests: Fix invocation of 'help -cells' 2023-07-10 12:42:09 +02:00
hierarchy.sh
hierarchy_defer.ys
hierarchy_generate.ys add command that should not have any effect to hierarchy -generate test (this documents the current behavior, not sure if it is desired functionality) 2024-04-12 13:51:06 +02:00
hierarchy_param.ys
ice40_mince_abc9.ys
integer_range_bad_syntax.ys
integer_real_bad_syntax.ys
json_escape_chars.ys fix handling of escaped chars in json backend and frontend 2022-02-18 17:13:09 +01:00
json_scopeinfo.ys emit $scopeinfo cells by default 2025-01-08 14:47:46 +01:00
keep_hierarchy.ys Add keep_hierarchy test 2024-11-05 09:28:45 +01:00
lcov.gold print summary of line coverage to log 2025-07-16 13:40:07 +02:00
lcov.v update test to use suggested selection for assertions 2025-07-01 11:46:27 +02:00
lcov.ys update test to use suggested selection for assertions 2025-07-01 11:46:27 +02:00
logger_cmd_error.sh Add test of error not getting silenced 2024-10-07 14:49:17 +02:00
logger_error.ys
logger_fail.sh tests: use /usr/bin/env for bash. 2023-08-12 11:59:39 +10:00
logger_nowarning.ys
logger_warn.ys
logger_warning.ys
logic_param_simple.ys
mem2reg.ys
memory_word_as_index.data Fix elaboration of whole memory words used as indices 2020-12-26 21:47:38 -07:00
memory_word_as_index.v Fix elaboration of whole memory words used as indices 2020-12-26 21:47:38 -07:00
memory_word_as_index.ys Fix elaboration of whole memory words used as indices 2020-12-26 21:47:38 -07:00
muxcover.ys muxcover: do not add decode muxes with x inputs 2023-01-26 05:19:45 +00:00
muxpack.v More deadname stuff 2021-06-09 12:40:33 +02:00
muxpack.ys More deadname stuff 2021-06-09 12:40:33 +02:00
param_struct.ys tests: remove -seq 1 from sat with -tempinduct where possible 2025-09-08 18:04:32 +02:00
peepopt.ys peepopt: Fix padding for the peepopt_shiftmul_right pattern 2023-12-06 18:35:44 +01:00
peepopt_formal.ys peepopt clockgateff: add testcase 2024-08-07 10:21:52 +01:00
plugin.cc
plugin.sh
pmgen_reduce.ys
pmux2shiftx.v
pmux2shiftx.ys
port_sign_extend.v genrtlil: fix signed port connection codegen failures 2021-02-05 19:51:30 -05:00
port_sign_extend.ys genrtlil: fix signed port connection codegen failures 2021-02-05 19:51:30 -05:00
primitives.ys
printattr.ys
rand_const.sv Allow combination of rand and const modifiers 2021-01-21 08:42:05 -07:00
rand_const.ys Allow combination of rand and const modifiers 2021-01-21 08:42:05 -07:00
reg_wire_error.sv
reg_wire_error.ys
rename_scramble_name.ys rename: add -scramble-name option to randomly rename selections 2022-08-08 16:03:28 +01:00
rename_unescape.ys rename.cc: Fixup ports after -unescape 2025-08-15 10:48:32 +12:00
rename_wire_move_to_cell.ys rename: add -move-to-cell option in -wire mode 2025-08-13 11:11:52 +02:00
rtlil_signed_attribute.ys Ensure signed constants are correctly parsed, represented, and exported in RTLIL. Add a test to check parsing and exporting 2024-08-21 14:28:42 +01:00
rtlil_z_bits.ys backends/rtlil: Do not shorten a value with z bits to 'x 2023-01-29 14:02:25 +01:00
run-test.sh test: restore verific handling, nicer naming 2024-12-13 10:24:47 +01:00
scopeinfo.ys Test flatten and opt_clean's $scopeinfo handling 2024-02-06 17:51:29 +01:00
scratchpad.ys
script.ys
setundef.sv Fix setting bits of parameters in setundef pass 2024-11-08 17:03:08 +01:00
setundef.ys Fix setting bits of parameters in setundef pass 2024-11-08 17:03:08 +01:00
sformatf.ys ast: use new format string helpers. 2023-08-11 04:46:52 +02:00
shregmap.v
shregmap.ys
signed.ys
signext.ys
sim_const.ys
specify.v
specify.ys
splitnets.ys splitnets: handle single-bit vectors consistently 2025-06-05 10:58:06 +02:00
src.ys
sta.ys sta: very crude static timing analysis pass 2021-11-25 17:20:27 +01:00
stat.ys updated testcase 2025-08-16 09:32:08 +02:00
stat_area_by_width.lib removed copyright notice on lib file. 2025-08-16 09:40:03 +02:00
stat_hierarchy.ys add Testcases 2025-08-13 14:46:01 +02:00
stat_high_level.ys testcases 2025-08-16 09:40:03 +02:00
stat_high_level2.ys testcases 2025-08-16 09:40:03 +02:00
struct_access.sv Fix access to whole sub-structs (#3086) 2022-02-14 14:34:20 +01:00
struct_access.ys tests: Run async2sync before sat and/or sim to handle $check cells 2024-02-01 16:14:11 +01:00
sub.v Add test for bug 3462 2022-08-29 10:10:09 +02:00
submod.ys
submod_extract.ys
sv_defines.ys Add support for SystemVerilog-style `define to Verilog frontend 2020-03-27 16:08:26 +00:00
sv_defines_dup.ys
sv_defines_mismatch.ys
sv_defines_too_few.ys
sv_implicit_ports.sh tests: use /usr/bin/env for bash. 2023-08-12 11:59:39 +10:00
svalways.sh tests: use /usr/bin/env for bash. 2023-08-12 11:59:39 +10:00
tcl_apis.tcl Redo integer passing on top of bignum 2024-12-02 19:56:51 +01:00
tcl_apis.v Redo integer passing on top of bignum 2024-12-02 19:56:51 +01:00
tcl_apis.ys Fix test 2024-11-04 16:19:59 +01:00
wrapcell.ys wrapcell: Test check -assert post wrapping 2024-12-10 15:13:31 +01:00
wreduce.ys
wreduce2.ys wreduce: Optimize signedness when possible 2024-12-16 12:57:08 +01:00
write_gzip.ys
xaiger.ys