3960 commits

Author	SHA1	Message	Date
Clifford Wolf	d68c993ed2	Changed more code to the new RTLIL::Wire constructors	2014-07-26 21:30:38 +02:00
Clifford Wolf	946ddff9ce	Changed a lot of code to the new RTLIL::Wire constructors	2014-07-26 20:12:50 +02:00
Clifford Wolf	3f4e3ca8ad	More RTLIL::Cell API usage cleanups	2014-07-26 16:14:02 +02:00
Clifford Wolf	97a59851a6	Added RTLIL::Cell::has(portname)	2014-07-26 16:11:28 +02:00
Clifford Wolf	f8fdc47d33	Manual fixes for new cell connections API	2014-07-26 15:58:23 +02:00
Clifford Wolf	b7dda72302	Changed users of cell->connections_ to the new API (sed command) ... git grep -l 'connections_' | xargs sed -i -r -e ' s/(->|\.)connections_\["([^"]*)"\] = (.*);/\1set("\2", \3);/g; s/(->|\.)connections_\["([^"]*)"\]/\1get("\2")/g; s/(->|\.)connections_.at\("([^"]*)"\)/\1get("\2")/g; s/(->|\.)connections_.push_back/\1connect/g; s/(->|\.)connections_/\1connections()/g;'	2014-07-26 15:58:23 +02:00
Clifford Wolf	cc4f10883b	Renamed RTLIL::{Module,Cell}::connections to connections_	2014-07-26 11:58:03 +02:00
Clifford Wolf	4755e14e7b	Added copy-constructor-like module->addCell(name, other) method	2014-07-26 00:38:44 +02:00
Clifford Wolf	2bec47a404	Use only module->addCell() and module->remove() to create and delete cells	2014-07-25 17:56:19 +02:00
Clifford Wolf	5826670009	Various RTLIL::SigSpec related code cleanups	2014-07-25 14:25:42 +02:00
Clifford Wolf	0520bfea89	Fixed memory corruption in "opt_reduce" pass	2014-07-25 12:49:51 +02:00
Clifford Wolf	c4e4f79a2a	Disabled cover() for non-linux builds	2014-07-25 12:27:36 +02:00
Clifford Wolf	91bf0c90c8	Improvements in "cover" command	2014-07-25 12:04:40 +02:00
Clifford Wolf	6aa792c864	Replaced more old SigChunk programming patterns	2014-07-24 23:10:58 +02:00
Clifford Wolf	9962384d3e	Added cover() calls to opt_const	2014-07-24 20:47:18 +02:00
Clifford Wolf	45b4154b37	Added "make SMALL=1"	2014-07-24 19:03:57 +02:00
Clifford Wolf	b17d6531c8	Added "make PRETTY=1"	2014-07-24 17:15:01 +02:00
Clifford Wolf	2f54345cff	Added "cover" command	2014-07-24 16:14:19 +02:00
Clifford Wolf	20a7965f61	Various small fixes (from gcc compiler warnings)	2014-07-23 20:45:27 +02:00
Clifford Wolf	c094c53de8	Removed RTLIL::SigSpec::optimize()	2014-07-23 20:32:28 +02:00
Clifford Wolf	a62c21c9c6	Removed RTLIL::SigSpec::expand() method	2014-07-23 19:34:51 +02:00
Clifford Wolf	4e802eb7f6	Fixed all users of SigSpec::chunks_rw() and removed it	2014-07-23 15:36:09 +02:00
Clifford Wolf	ec923652e2	Refactoring {SigSpec|SigChunk}(RTLIL::Wire *wire, ..) constructor -- step 3/3	2014-07-23 09:52:55 +02:00
Clifford Wolf	a8d3a68971	Refactoring {SigSpec|SigChunk}(RTLIL::Wire *wire, ..) constructor -- step 2/3	2014-07-23 09:49:43 +02:00
Clifford Wolf	260c19ec5a	Refactoring {SigSpec|SigChunk}(RTLIL::Wire *wire, ..) constructor -- step 1/3	2014-07-23 09:34:47 +02:00
Clifford Wolf	4a6d234ec7	SigSpec refactoring: cleanup of old SigSpec usage in fsm_* commands	2014-07-22 23:11:36 +02:00
Clifford Wolf	65a939cb27	Fixed memory corruption with new SigSpec API in proc_mux	2014-07-22 22:54:39 +02:00
Clifford Wolf	e7e30f1c86	fixed memory leak in fsm_opt	2014-07-22 22:52:57 +02:00
Clifford Wolf	28b3fd05fa	SigSpec refactoring: change RTLIL::SigSpec::chunks() to be read-only, created interim RTLIL::SigSpec::chunks_rw()	2014-07-22 20:58:44 +02:00
Clifford Wolf	4b4048bc5f	SigSpec refactoring: using the accessor functions everywhere	2014-07-22 20:39:37 +02:00
Clifford Wolf	a233762a81	SigSpec refactoring: renamed chunks and width to __chunks and __width	2014-07-22 20:39:37 +02:00
Clifford Wolf	137dbf3cf7	Added "opt_const -keepdc"	2014-07-21 21:38:55 +02:00
Clifford Wolf	1873480ca5	Added mul to mux conversion to "opt_const -fine"	2014-07-21 17:19:50 +02:00
Clifford Wolf	1241a9fd50	Added "opt_const -fine" and "opt_reduce -fine"	2014-07-21 16:34:16 +02:00
Clifford Wolf	e035f1d886	Added opt_const support for simple identities	2014-07-21 14:41:02 +02:00
Clifford Wolf	361e0d62ff	Replaced depricated NEW_WIRE macro with module->addWire() calls	2014-07-21 12:42:02 +02:00
Clifford Wolf	1d88f1cf9f	Removed deprecated module->new_wire()	2014-07-21 12:35:06 +02:00
Clifford Wolf	3cb61d03f8	Wider range of cell types supported in "share" pass	2014-07-21 12:18:29 +02:00
Clifford Wolf	b49beab1f3	Use ezSAT::non_incremental() in "share" pass	2014-07-21 02:08:38 +02:00
Clifford Wolf	04fcb07213	Added support for resource sharing in mux control logic	2014-07-20 20:44:14 +02:00
Clifford Wolf	1ce5e83555	Added "select -assert-count"	2014-07-20 20:15:49 +02:00
Clifford Wolf	e9506bb2da	Supercell creation for $div/$mod worked all along, fixed test benches	2014-07-20 18:54:06 +02:00
Clifford Wolf	ff28029fdb	Fixed creation of shift supercells in "share" pass	2014-07-20 17:06:36 +02:00
Clifford Wolf	4c38ec1cc8	Added "miter -equiv -flatten"	2014-07-20 15:33:07 +02:00
Clifford Wolf	8d04ca7d22	Added call_on_selection() and call_on_module() API	2014-07-20 15:33:06 +02:00
Clifford Wolf	5b3ee7a072	Added "share" supercell creation	2014-07-20 15:01:17 +02:00
Clifford Wolf	7b98e46ac3	Added removing of always inactive cells to "share" pass	2014-07-20 13:24:36 +02:00
Clifford Wolf	8819493db4	Progress in "share" pass	2014-07-20 11:04:52 +02:00
Clifford Wolf	15fd615da5	Progress in "share" pass	2014-07-20 03:03:04 +02:00
Clifford Wolf	2278995bd8	Started to implement real resource sharing	2014-07-19 20:54:32 +02:00