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Author SHA1 Message Date
nella
3d0c868af0
Merge pull request #5952 from YosysHQ/nella/vector-index 
Optimize upto vector indexing (Fix #892).
 2026-06-22 09:05:26 +00:00
nella
6ffc938a75
Merge pull request #5701 from YosysHQ/gus/sim-with-vcd-tuneup 
Add warnings and errors to `sim -r` with VCD code path
 2026-06-22 09:02:32 +00:00
Miodrag Milanović
f699624abf
Merge pull request #5978 from YosysHQ/remove_def 
Remove define since snprintf is supported in MSVC now
 2026-06-22 08:49:26 +00:00
Miodrag Milanovic
94e43f7675 Remove define since snprintf is supported in MSVC now 2026-06-22 09:50:39 +02:00
Miodrag Milanovic
ebcbc06951 smtbmc: support latest bitwuzla 2026-06-22 08:40:16 +02:00
Mohamed Gaber
0e7671c1b3 Merge remote-tracking branch 'origin/main' into update_from_upstream 2026-06-21 15:07:32 +03:00
Mohamed Gaber
2383dbda21 CMake: rework Silimate Verific file to work with Linux linker 2026-06-21 15:02:54 +03:00
Akash Levy
635c40ff46
Merge pull request #190 from Silimate/opt_first_fit_alloc 
opt_first_fit_alloc
 2026-06-21 02:06:12 -07:00
Akash Levy
8cdbd62394 opt_first_fit_alloc: address Greptile review 
- pack_lanes: assert elem_w < 32 and pack the full element width instead
  of silently dropping bits >= 31.
- Remove the dead `cell` struct member and its unused assignment in run()
  (every emit helper shadows it with its own local `cell`).
- Decorrelate the pseudo-random bc bits from en (independent mix) so they
  no longer share an LFSR bit (e.g. en[7]/bc[0] for n=8).
- Add purpose comments to fingerprint_dsel and lane_of_bit.

Declined the std::stoi/std::stoll arg-parsing suggestion: it matches the
established convention in sibling passes (opt_argmax, opt_priority_onehot).

Co-authored-by: Cursor <cursoragent@cursor.com>
 2026-06-21 01:21:06 -07:00
Akash Levy
dc995eba98 opt_first_fit_alloc 2026-06-21 00:56:39 -07:00
Amelia Dobis
41566a6b70
more typo found 2026-06-19 17:47:39 -04:00
Amelia Dobis
54d43d85e3
[docs] nit: usign the right acronym to refer to the right thing 
Tiny nit, but the description of `RTLIL::Wire` was using MSB and LSB to refer to the least and most significant *bits* of a wire and not Bytes, which should be referred to using LSb and MSb instead
 2026-06-19 17:30:28 -04:00
Krystine Sherwin
b77bb851ed
tests: Add mixed_upto write_verilog test 2026-06-19 11:20:01 +12:00
Krystine Sherwin
338d4adef2
write_verilog: Fix upto indexing for single bit 2026-06-19 10:18:27 +12:00
Mohamed Gaber
9316df4480
ci: update release flow 2026-06-19 01:17:40 +03:00
Mohamed Gaber
4db5fe5f6d
Merge remote-tracking branch 'silimate/main' into update_from_upstream 2026-06-19 00:07:08 +03:00
Mohamed Gaber
d423c5c03a
chore: disable failing tests until we can take a deeper look at them 2026-06-18 23:02:21 +03:00
nella
5d7486115a
Merge pull request #5887 from YosysHQ/nella/fix-signedness-4402 
Fix: `read_verilog` doesn't respect `signed` keyword
 2026-06-18 16:53:37 +00:00
nella
2195277b5a
Merge pull request #5960 from YosysHQ/nella/latch-infer 
proc_dlatch - infer $adlatch (Fix #5910).
 2026-06-18 16:50:48 +00:00
nella
c99a037c33
Merge pull request #5886 from YosysHQ/nella/fix-signedness-5745 
Fix  `chparam` values are unsigned when using read_verilog frontend
 2026-06-18 16:50:22 +00:00
Akash Levy
fe9689eaaf Small update 2026-06-18 05:26:28 -07:00
Miodrag Milanović
c9805ceb33
Merge pull request #5966 from maliberty/lz4-1.10.0-cve 
Update lz4 to 1.10.0 for CVE-2014-4715, CVE-2021-3520, CVE-2019-17543
 2026-06-18 11:32:12 +00:00
Akash Levy
db7cfd404d Fix cut_region.h debug 2026-06-18 04:02:52 -07:00
Akash Levy
9c80f1443c
Merge pull request #189 from Silimate/opt_carry_select 
opt_carry_select pass
 2026-06-18 04:01:39 -07:00
Akash Levy
9df378f8ac opt_carry_select pass 2026-06-18 02:36:29 -07:00
Matt Liberty
7fbeb344a4 Update lz4 to 1.10.0 for CVE-2014-4715, CVE-2021-3520, CVE-2019-17543 
Signed-off-by: Matt Liberty <mliberty@precisioninno.com>
 2026-06-18 07:00:59 +00:00
Miodrag Milanović
72f6df873a
Merge pull request #5964 from YosysHQ/mingw_fix 
Fix share lookup for mingw builds
 2026-06-17 18:32:02 +00:00
Mohamed Gaber
a4042f69b1
passes/silimate: remove leftover Makefile.inc 2026-06-17 21:14:44 +03:00
Mohamed Gaber
98a1db2756
equiv_opt: support -ignore-unknown-cells 2026-06-17 21:10:02 +03:00
Mohamed Gaber
8267cf87b5
infer_ce: remove pass 2026-06-17 21:01:20 +03:00
Miodrag Milanovic
88d4af94cf Fix share lookup for mingw builds 2026-06-17 10:40:13 +02:00
Mohamed Gaber
5d3819b52f
fix: missing custom-Silimate $icg in NewCellTypes 2026-06-16 21:41:41 +03:00
Mohamed Gaber
bd7c32f8a6
CMake: Linux fixes + Merge fallout fix 2026-06-16 19:32:45 +03:00
Miodrag Milanović
e2903c4a5c
Merge pull request #5959 from YosysHQ/improve_test 
Improve test
 2026-06-16 08:46:11 +00:00
Miodrag Milanović
211fa48ce5
Merge pull request #5962 from YosysHQ/update_abc 
Update ABC as per 2026-06-15
 2026-06-16 08:39:41 +00:00
Miodrag Milanovic
3af45e7d04 Some more explanations 2026-06-16 10:31:37 +02:00
Miodrag Milanovic
0584587f9a Make compilation like by abc scripts 2026-06-16 10:07:45 +02:00
Mohamed Gaber
1d94aa6965
misc: fix unused variable in new main branch merge 2026-06-16 02:14:27 +03:00
Mohamed Gaber
569ab1231b
Merge remote-tracking branch 'silimate/main' into update_from_upstream 2026-06-16 02:02:41 +03:00
Akash Levy
d928afec67
Merge pull request #188 from Silimate/generalize_opt_passes 
Generalize and refactor opt_* passes of Silimate
 2026-06-15 14:38:09 -07:00
Akash Levy
23b021a26b Fix opt_compact_prefix wide packs and opt_priority_onehot max-width test 
The tests/silimate suite (which aborted the Run tests CI job) exposed two
issues in the generalized passes:

- opt_compact_prefix: the forward dense pack regressions at 64 and 128 bits
  no longer rewrote. The ConstEval fingerprint was uint64_t-based (capped at
  62 bits) and the per-cone cell cap (max_width*96) was below the O(width^2)
  cell count of a wide pack. The fingerprint now drives whole-width Const
  bit patterns (no width cap) and the cone cap scales quadratically; total
  work stays bounded by the shared walk/eval budgets.

- opt_priority_onehot: the "max-width below lane count" negative test set
  max_width=8 on a 16-lane design expecting no rewrite, but the generalized
  matcher legitimately (and equivalence-provably) rewrites the 8-lane
  sub-region. The test now uses max_width=3 (below min_width 4) to verify
  the width gate suppresses all matching.

Co-authored-by: Cursor <cursoragent@cursor.com>
 2026-06-15 12:02:09 -07:00
Miodrag Milanovic
83ee00d312 Update ABC as per 2026-06-15 2026-06-15 19:42:17 +02:00
Akash Levy
1cc985314a Cleanup 2026-06-15 09:09:27 -07:00
Emil J
f33cc39a0c
Merge pull request #5958 from YosysHQ/emil/opt_muxtree-single-driver 
opt_muxtree: error on multiple drivers
 2026-06-15 15:00:48 +00:00
nella
c0709b1b4e Fixup issue test. 2026-06-15 16:23:44 +02:00
Miodrag Milanovic
782f9ddd24 Added functional tests option 2026-06-15 16:04:37 +02:00
nella
eb4703808a Add tests. 2026-06-15 15:46:13 +02:00
nella
a5bdb29d7f Recognise asynchronous set/reset. 2026-06-15 15:44:50 +02:00
Miodrag Milanovic
247bcfed65 Remove old Makefile and fix documentation 2026-06-15 15:25:58 +02:00
Emil J. Tywoniak
48c1e1a724 tests: remove hana test with multiple drivers 2026-06-15 15:08:26 +02:00