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https://github.com/YosysHQ/yosys
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Cleanup
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parent
83baed6731
commit
1cc985314a
2 changed files with 11 additions and 43 deletions
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@ -89,7 +89,6 @@ struct OptArgmaxWorker : CutRegionWorker
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int index_width = 0;
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int value_width = 0;
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Cell *anchor = nullptr;
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IdString anchor_port;
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pool<Cell *> cut_cells;
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};
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@ -199,7 +198,8 @@ struct OptArgmaxWorker : CutRegionWorker
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// winner index alone: probing two valid lanes with indices (a, b) tells
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// whether T[a] < T[b]. The table is learned up to order isomorphism
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// (ranks) and then verified by the regular fingerprint.
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bool learn_const_table(const Candidate &cand, vector<uint64_t> &table)
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bool learn_const_table(const Candidate &cand, vector<uint64_t> &table,
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vector<int> &ok_index)
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{
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int n = cand.width;
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ConstEval ce(module);
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@ -295,32 +295,6 @@ struct OptArgmaxWorker : CutRegionWorker
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return true;
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}
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// Index values whose learned table entries behave consistently; the
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// fingerprint restricts its index test vectors to these (set by
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// learn_const_table, consumed via Candidate::ok_index).
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vector<int> ok_index;
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bool find_anchor_driver(const SigSpec &out_sig, Cell *&anchor, IdString &anchor_port)
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{
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for (auto bit : sigmap(out_sig)) {
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Cell *drv = bit_to_driver.at(bit, nullptr);
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if (drv == nullptr)
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continue;
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for (auto &conn : drv->connections()) {
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if (!drv->output(conn.first))
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continue;
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for (auto out_bit : sigmap(conn.second)) {
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if (out_bit == bit) {
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anchor = drv;
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anchor_port = conn.first;
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return true;
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}
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}
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}
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}
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return false;
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}
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uint64_t value_mask(int width)
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{
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if (width >= 64)
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@ -597,7 +571,7 @@ struct OptArgmaxWorker : CutRegionWorker
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last_cut_fail.c_str());
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return false;
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}
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if (!find_anchor_driver(cand.out_sig, cand.anchor, cand.anchor_port))
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if (!find_anchor_driver(cand.out_sig, cand.anchor))
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return false;
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fp_attempts++;
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@ -668,7 +642,6 @@ struct OptArgmaxWorker : CutRegionWorker
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int lanes = 0;
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int value_width = 0;
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Cell *anchor = nullptr;
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IdString anchor_port;
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pool<Cell *> cut_cells;
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};
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@ -845,6 +818,12 @@ struct OptArgmaxWorker : CutRegionWorker
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if (module->has_processes_warn())
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return;
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// run() and run_max_select() share this worker (and its work
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// budgets), so reset the one-shot note flag: the max-select phase
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// must still report if it skips roots, even when run() already
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// exhausted and logged for the argmax phase.
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budget_noted = false;
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// Cheap module prefilter: a compare-select tree needs compares and
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// muxes.
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bool has_cmp = false, has_mux = false;
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@ -1007,7 +986,7 @@ struct OptArgmaxWorker : CutRegionWorker
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cand.values_name = values.name;
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cand.lanes = n;
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cand.value_width = vw;
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if (!find_anchor_driver(root.sig, cand.anchor, cand.anchor_port))
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if (!find_anchor_driver(root.sig, cand.anchor))
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break;
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// Unmasked form first.
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@ -1379,12 +1358,11 @@ struct OptArgmaxWorker : CutRegionWorker
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vector<uint64_t> table;
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fp_attempts++;
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if (!learn_const_table(cand, table)) {
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if (!learn_const_table(cand, table, cand.ok_index)) {
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log_debug(" valid=%s index=%s values=<learned>: order probe failed\n",
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valid.name.c_str(), index.name.c_str());
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continue;
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}
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cand.ok_index = ok_index;
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cand.value_width = std::max(1, clog2_int(width));
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cand.values_sig = SigSpec(packed_table_const(table, cand.value_width));
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if (!check_candidate(cand, cone))
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@ -72,16 +72,6 @@ struct OptCompactPrefixWorker : CutRegionWorker
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{
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}
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// Cut buses only need to consist of wire bits; FF outputs (cone leaves)
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// are valid region boundaries even though they have no comb driver.
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bool sig_bus_ok(const SigSpec &sig)
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{
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for (auto bit : sigmap(sig))
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if (!bit.wire)
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return false;
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return true;
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}
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// Lane-ordered bus extraction: for unrolled scan loops the i-th output
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// bit is produced at the i-th loop step, so a boundary signal that first
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// influences root bit i (LSB-first scans; last, for MSB-first scans) is
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