abhinavputhran
5048dac854
setundef: add tests for selection in -zero, -undriven, and -init modes. also made setundef.cc clearer
2026-03-06 18:12:03 -05:00
abhinavputhran
9e666c727f
setundef: respect selection in -undriven mode
2026-03-06 10:37:59 -05:00
abhinavputhran
6cd66aed47
setundef: rename process loop variable and respect selection in -init mode
2026-03-05 17:51:01 -05:00
abhinavputhran
df283fa1c9
setundef: use selected_processes() per review feedback
2026-03-05 11:22:00 -05:00
abhinavputhran
4e54853e35
setundef: use selected_processes() per review feedback
2026-03-05 11:16:07 -05:00
abhinavputhran
94c789e9c8
setundef: respect selection for cells, processes, and connections
...
Previously, setundef would rewrite sigspecs in all cells, processes,
and connections regardless of the active selection. Only modules and
memories were correctly filtered by selection.
Fix by using module->selected_cells() for cells, adding a
module->selected() check for processes, and checking wire selection
on the lhs of each connection before rewriting.
Fixes #5624
2026-03-04 17:48:35 -05:00
Emil J
0d7a875675
Merge pull request #5512 from YosysHQ/emil/turbo-celltypes
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celltypes: compile-time lookup tables for internal cells
2026-03-04 14:47:57 +00:00
nella
66bd4716cf
rtlil use newcelltypes.
2026-03-04 12:39:45 +01:00
Emil J. Tywoniak
ecb8b20f62
yosys: use newcelltypes for yosys_celltypes users
2026-03-04 12:39:44 +01:00
Emil J. Tywoniak
4ab22cbb97
abc: use newcelltypes
2026-03-04 12:22:14 +01:00
Emil J. Tywoniak
07ec8708e4
share: use newcelltypes
2026-03-04 12:22:14 +01:00
Emil J. Tywoniak
9e59f05c25
newcelltypes: wrap design celltypes support
2026-03-04 12:22:14 +01:00
Emil J. Tywoniak
35ccaa60d7
newcelltypes: TurboCellTypes -> StaticCellTypes
2026-03-04 12:22:14 +01:00
Emil J. Tywoniak
6adc08b0e5
opt_expr: use newcelltypes
2026-03-04 12:22:14 +01:00
Emil J. Tywoniak
3671d577a0
opt_clean: use newcelltypes
2026-03-04 12:22:14 +01:00
Miodrag Milanović
05d1d56b9d
Merge pull request #5704 from apullin/apullin/abc9-no-loops-fix
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abc9: preserve topological-loop asserts with targeted SCC fallback
2026-03-04 11:09:38 +01:00
Miodrag Milanovic
b7d013e6bf
Fix help message for equiv passes
2026-03-04 07:46:40 +01:00
KrystalDelusion
1d3f9b7905
Merge pull request #5687 from YosysHQ/nella/pdr-doc
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Update help text for rename -witness and write_aiger -ywmap
2026-03-02 09:29:25 +13:00
Andrew Pullin
5970be33fb
abc9: preserve topological-loop asserts with targeted SCC fallback
...
A real-world ABC9 flow hit residual combinational loops after SCC breaking, tripping the prep_xaiger loop assertion.
Keep the existing topological assertions in place (prep_xaiger and reintegrate still assert no_loops).
To handle residual non-box loops, add a targeted fallback in prep_xaiger: when loops remain after normal SCC breaking, insert additional $__ABC9_SCC_BREAKER cuts on non-box loop cells, rebuild toposort, and then re-check the existing assertion.
Also keep pre-ABC9 SCC tagging on all cell types (scc -all_cell_types) and add a regression test (tests/techmap/abc9-nonbox-loop-with-box.ys).
2026-02-26 22:30:32 -08:00
Emil J
5f8489d36d
Merge pull request #5666 from YosysHQ/emil/equiv_induct-missing-model-errors
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equiv_induct: error on missing model
2026-02-25 15:39:31 +01:00
Miodrag Milanović
0ed7c5ad53
Merge pull request #5620 from YosysHQ/lofty/abc9-verify
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abc9: verify post-mapping equivalence by default
2026-02-20 13:41:11 +01:00
Krystine Sherwin
094481739f
memory_libmap: Add -force-params
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Reduce complexity for adi brams by unconditionally providing the WIDTH and ABITS parameters.
2026-02-20 10:57:00 +00:00
nella
01e89a8f9e
Remove cell mentions.
2026-02-18 09:29:35 +01:00
nella
2b4f481850
Cleanup docs.
2026-02-18 09:24:41 +01:00
Emil J. Tywoniak
77f64de997
satgen: move report_missing_model here from equiv.h
2026-02-16 17:01:09 +01:00
Emil J. Tywoniak
81ea922512
sat: use the same cell import warnings as equiv
2026-02-16 16:54:26 +01:00
nella
e6e57b33e3
document abc --keep-going pdr [sc-220].
2026-02-15 09:00:04 +01:00
Gus Smith
8ab105ac28
Merge pull request #4303 from Coloquinte/sat_choice
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Infrastructure to run a Sat solver as a command
2026-02-11 06:54:53 -08:00
Emil J
fba29ea8f1
Merge pull request #5679 from YosysHQ/emil/abc9-remove-liberty
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abc9: remove -liberty
2026-02-11 12:36:29 +01:00
Emil J. Tywoniak
915912cc76
abc9: remove -dont_use
2026-02-11 11:39:09 +01:00
Emil J. Tywoniak
c4094e457b
abc9: remove -genlib, -constr
2026-02-11 11:34:54 +01:00
Emil J. Tywoniak
5a46106a46
abc9: remove -liberty
2026-02-11 01:04:50 +01:00
Gus Smith
6f6fa49d3c
Typo
2026-02-09 09:05:56 -08:00
Gus Smith
1502e23371
Set solver from scratchpad or command line
2026-02-06 19:26:32 -08:00
Gus Smith
f062a0c8d6
Typo
2026-02-06 17:26:08 -08:00
Robert O'Callahan
34f8582725
Sanitize ABC global and per-run temporary directory names in logs
2026-02-07 12:12:13 +13:00
Emil J
1717fa0180
Merge pull request #5663 from YosysHQ/emil/opt_expr-fix-pow-shift
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opt_expr: fix const lhs of $pow to $shl
2026-02-05 13:09:01 +01:00
Emil J
8bbde80e02
Merge pull request #5631 from rocallahan/cleanup-compare-signals
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Clean up `compare_signals()` in `opt_clean`
2026-02-04 17:45:05 +01:00
Emil J
992e64342c
Merge pull request #5621 from rocallahan/remove-opt-sort
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Remove `Design::sort()` calls from optimization passes
2026-02-04 16:55:56 +01:00
Robert O'Callahan
7326bb7d66
Only reuse ABC processes if we're using yosys-abc and it was built with ENABLE_READLINE
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(cherry picked from commit 5054fd17d7
2026-02-04 17:19:10 +13:00
Emil J. Tywoniak
ed53ff2f49
equiv_simple, equiv_induct: fix config
2026-02-03 18:37:39 +01:00
Emil J. Tywoniak
8d1c1faf82
equiv_simple, equiv_induct: error by default on missing model, add -ignore-unknown-cells
2026-02-03 18:10:29 +01:00
Emil J. Tywoniak
8e73e2a306
sat: add -ignore-unknown-cells instead of -ignore_unknown_cells for consistency
2026-02-03 18:10:29 +01:00
Emil J. Tywoniak
000be270ca
equiv_simple, equiv_induct: refactor
2026-02-03 17:54:46 +01:00
Emil J. Tywoniak
3bfeaee8ca
opt_expr: fix const lhs of $pow to $shl
2026-02-03 11:59:00 +01:00
KrystalDelusion
414b1b6019
Merge pull request #5651 from rocallahan/abc-error-nonfatal
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Handle ABC nonfatal "Error:" messages
2026-02-03 08:55:05 +13:00
Miodrag Milanović
ac427a79b0
Merge pull request #5644 from nataliakokoromyti/upstream-linux-perf-unistd
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Add unistd header for Linux
2026-01-30 08:17:43 +01:00
Robert O'Callahan
9c56c93632
Add missing newlines to some 'log_error's
2026-01-30 01:52:19 +00:00
Robert O'Callahan
6af1b5b19c
Don't treat ABC 'Error:' output as indicating a fatal error, since these messages aren't necessarily fatal
2026-01-30 01:52:19 +00:00
Emil J
a68fee1115
Merge pull request #5646 from rocallahan/debug-design_equal
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Dump module details when `design_equal` fails
2026-01-29 18:57:24 +01:00
