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setundef: rename process loop variable and respect selection in -init mode

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This commit is contained in:
abhinavputhran 2026-03-05 17:51:01 -05:00
parent df283fa1c9
commit 6cd66aed47
1 changed files with 11 additions and 2 deletions
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13
passes/cmds/setundef.cc
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@ -417,6 +417,9 @@ struct SetundefPass : public Pass {
if (wire->name[0] == (wire_types ? '\\' : '$'))
continue;
if (!design->selected(module, wire))
continue;
if (!wire->attributes.count(ID::init))
continue;
@ -446,6 +449,9 @@ struct SetundefPass : public Pass {
if (wire->name[0] == (wire_types ? '\\' : '$'))
continue;
if (!design->selected(module, wire))
continue;
for (auto bit : sigmap(wire))
if (!ffbits.count(bit))
goto next_wire;
@ -467,6 +473,9 @@ struct SetundefPass : public Pass {
if (wire->name[0] == (wire_types ? '\\' : '$'))
continue;
if (!design->selected(module, wire))
continue;
for (auto bit : sigmap(wire))
if (ffbits.count(bit))
initwires.insert(wire);
@ -505,8 +514,8 @@ struct SetundefPass : public Pass {
for (auto cell : module->selected_cells())
if (!cell->get_bool_attribute(ID::xprop_decoder))
cell->rewrite_sigspecs(worker);
for (auto &it : module->selected_processes())
it->rewrite_sigspecs(worker);
for (auto proc : module->selected_processes())
proc->rewrite_sigspecs(worker);
for (auto &it : module->connections_) {
SigSpec lhs = it.first;
bool selected = false;