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https://github.com/YosysHQ/yosys
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Set solver from scratchpad or command line
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b2f9ac4fb5
commit
1502e23371
2 changed files with 42 additions and 5 deletions
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@ -59,6 +59,7 @@ struct SatSolver
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struct ezSatPtr : public std::unique_ptr<ezSAT> {
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ezSatPtr() : unique_ptr<ezSAT>(yosys_satsolver->create()) { }
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explicit ezSatPtr(SatSolver *solver) : unique_ptr<ezSAT>((solver ? solver : yosys_satsolver)->create()) { }
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};
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struct SatGen
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@ -31,6 +31,22 @@
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USING_YOSYS_NAMESPACE
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PRIVATE_NAMESPACE_BEGIN
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static SatSolver *find_satsolver(const std::string &name)
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{
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for (auto solver = yosys_satsolver_list; solver != nullptr; solver = solver->next)
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if (solver->name == name)
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return solver;
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return nullptr;
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}
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static std::string list_satsolvers()
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{
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std::string result;
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for (auto solver = yosys_satsolver_list; solver != nullptr; solver = solver->next)
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result += result.empty() ? solver->name : ", " + solver->name;
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return result;
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}
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struct SatHelper
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{
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RTLIL::Design *design;
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@ -60,8 +76,8 @@ struct SatHelper
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int max_timestep, timeout;
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bool gotTimeout;
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SatHelper(RTLIL::Design *design, RTLIL::Module *module, bool enable_undef, bool set_def_formal) :
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design(design), module(module), sigmap(module), ct(design), satgen(ez.get(), &sigmap)
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SatHelper(RTLIL::Design *design, RTLIL::Module *module, SatSolver *solver, bool enable_undef, bool set_def_formal) :
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design(design), module(module), sigmap(module), ct(design), ez(solver), satgen(ez.get(), &sigmap)
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{
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this->enable_undef = enable_undef;
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satgen.model_undef = enable_undef;
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@ -1066,6 +1082,10 @@ struct SatPass : public Pass {
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log(" -timeout <N>\n");
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log(" Maximum number of seconds a single SAT instance may take.\n");
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log("\n");
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log(" -select-solver <name>\n");
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log(" Select SAT solver implementation for this invocation.\n");
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log(" If not given, uses scratchpad key 'sat.solver' if set, otherwise default.\n");
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log("\n");
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log(" -verify\n");
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log(" Return an error and stop the synthesis script if the proof fails.\n");
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log("\n");
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@ -1097,8 +1117,14 @@ struct SatPass : public Pass {
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log_header(design, "Executing SAT pass (solving SAT problems in the circuit).\n");
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std::string solver_name = design->scratchpad_get_string("sat.solver", "");
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size_t argidx;
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for (argidx = 1; argidx < args.size(); argidx++) {
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if (args[argidx] == "-select-solver" && argidx+1 < args.size()) {
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solver_name = args[++argidx];
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continue;
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}
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if (args[argidx] == "-all") {
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loopcount = -1;
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continue;
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@ -1336,6 +1362,14 @@ struct SatPass : public Pass {
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}
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extra_args(args, argidx, design);
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SatSolver *solver = yosys_satsolver;
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if (!solver_name.empty()) {
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solver = find_satsolver(solver_name);
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if (solver == nullptr)
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log_cmd_error("Unknown SAT solver '%s'. Available solvers: %s\n",
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solver_name, list_satsolvers());
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}
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RTLIL::Module *module = NULL;
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for (auto mod : design->selected_modules()) {
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if (module)
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@ -1398,13 +1432,15 @@ struct SatPass : public Pass {
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shows.push_back(wire->name.str());
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}
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log("Using SAT solver `%s`.\n", solver->name.c_str());
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if (tempinduct)
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{
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if (loopcount > 0 || max_undef)
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log_cmd_error("The options -max, -all, and -max_undef are not supported for temporal induction proofs!\n");
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SatHelper basecase(design, module, enable_undef, set_def_formal);
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SatHelper inductstep(design, module, enable_undef, set_def_formal);
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SatHelper basecase(design, module, solver, enable_undef, set_def_formal);
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SatHelper inductstep(design, module, solver, enable_undef, set_def_formal);
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basecase.sets = sets;
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basecase.set_assumes = set_assumes;
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@ -1593,7 +1629,7 @@ struct SatPass : public Pass {
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if (maxsteps > 0)
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log_cmd_error("The options -maxsteps is only supported for temporal induction proofs!\n");
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SatHelper sathelper(design, module, enable_undef, set_def_formal);
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SatHelper sathelper(design, module, solver, enable_undef, set_def_formal);
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sathelper.sets = sets;
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sathelper.set_assumes = set_assumes;
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