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document abc --keep-going pdr [sc-220].

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nella 2026-02-15 09:00:04 +01:00
parent a6e33d9916
commit e6e57b33e3
3 changed files with 46 additions and 6 deletions

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@ -931,6 +931,11 @@ struct AigerBackend : public Backend {
log("\n");
log(" -ywmap <filename>\n");
log(" write a map file for conversion to and from yosys witness traces.\n");
log(" The generated JSON map includes \"asserts\" and \"assumes\" arrays\n");
log(" containing the hierarchical witness paths of the corresponding\n");
log(" $assert and $assume cells. This enables downstream tools to map\n");
log(" AIGER bad-state properties and invariant constraints back to\n");
log(" individual formal properties by name.\n");
log("\n");
log(" -I, -O, -B, -L\n");
log(" If the design contains no input/output/assert/flip-flop then create one\n");

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@ -3,9 +3,9 @@ Symbolic model checking
.. todo:: check text context
.. note::
While it is possible to perform model checking directly in Yosys, it
.. note::
While it is possible to perform model checking directly in Yosys, it
is highly recommended to use SBY or EQY for formal hardware verification.
Symbolic Model Checking (SMC) is used to formally prove that a circuit has (or
@ -117,3 +117,33 @@ Result with fixed :file:`axis_master.v`:
Solving problem with 159144 variables and 441626 clauses..
SAT proof finished - no model found: SUCCESS!
Witness framework and per-property tracking
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
When using AIGER-based formal verification flows (such as the ``abc`` engine in
SymbiYosys), Yosys provides infrastructure for tracking individual formal
properties through the verification pipeline.
The ``rename -witness`` pass (run automatically by ``prep``) assigns public
names to all cells that participate in the witness framework:
- Witness signal cells: ``$anyconst``, ``$anyseq``, ``$anyinit``,
``$allconst``, ``$allseq``
- Formal property cells: ``$assert``, ``$assume``, ``$cover``, ``$live``,
``$fair``, ``$check``
These public names allow downstream tools to refer to individual properties by
their hierarchical path rather than by anonymous internal identifiers.
The ``write_aiger -ywmap`` option generates a JSON map file that includes, among
other things, ``"asserts"`` and ``"assumes"`` arrays. Each entry contains the
hierarchical witness path of the corresponding ``$assert`` or ``$assume`` cell.
This lets tools such as SymbiYosys map AIGER bad-state properties and invariant
constraints back to individual formal properties, enabling features like
per-property pass/fail reporting (e.g. ``abc pdr`` with ``--keep-going`` mode).
The ``write_smt2`` backend similarly uses the public witness names when emitting
``yosys-smt2-assert`` and ``yosys-smt2-assume`` comments. Cells whose
``hdlname`` attribute contains the ``_witness_`` marker are treated as having
private names for comment purposes, keeping solver output clean.

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@ -263,9 +263,14 @@ struct RenamePass : public Pass {
log(" rename -witness\n");
log("\n");
log("Assigns auto-generated names to all $any*/$all* output wires and containing\n");
log("cells that do not have a public name. This ensures that, during formal\n");
log("verification, a solver-found trace can be fully specified using a public\n");
log("hierarchical names.\n");
log("cells that do not have a public name. Also renames formal property cells\n");
log("($assert, $assume, $cover, $live, $fair, $check) that have private names,\n");
log("giving them public witness-trackable names.\n");
log("\n");
log("This ensures that, during formal verification, a solver-found trace can be\n");
log("fully specified using public hierarchical names, and that individual property\n");
log("results can be tracked by name in flows that support per-property reporting\n");
log("(e.g. SBY with abc pdr in --keep-going mode).\n");
log("\n");
log("\n");
log(" rename -hide [selection]\n");