Akash Levy
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34e5bc1129
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Merge branch 'YosysHQ:main' into master
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2024-08-14 16:56:53 -07:00 |
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Martin Povišer
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ab5d6b06b4
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read_liberty: Fix omitted helper change
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2024-08-13 20:12:38 +02:00 |
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Martin Povišer
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309d80885b
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read_liberty: Use available gate creation helpers
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2024-08-13 18:47:36 +02:00 |
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Martin Povišer
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3057c13a66
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Improve libparse encapsulation
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2024-08-13 18:47:36 +02:00 |
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Akash Levy
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68b3ad4bd3
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Display resource sharing count
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2024-08-06 02:27:09 -07:00 |
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Akash Levy
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c0af4604bc
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Update Yosys
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2024-07-30 16:55:18 -07:00 |
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Miodrag Milanović
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3e14e67374
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Merge pull request #4500 from YosysHQ/micko/vhdl_mixcase
VHDL is case insensitive, make sure netlist name is proper
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2024-07-29 16:44:13 +02:00 |
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Miodrag Milanovic
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405897a971
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Update top value that is returned back to hierarchy pass
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2024-07-29 15:50:38 +02:00 |
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Akash Levy
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f790b75c19
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Don't preserve user nets and update Verific tree balancing
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2024-07-25 06:01:06 -07:00 |
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Miodrag Milanovic
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9566709426
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Initialize extensions when verific pass is registered
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2024-07-25 11:25:17 +02:00 |
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Akash Levy
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f1114cc98c
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Simplify ignores
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2024-07-24 02:14:11 -07:00 |
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Akash Levy
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ebc9f96f85
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Merge branch 'YosysHQ:main' into master
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2024-07-23 15:01:54 -07:00 |
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Miodrag Milanovic
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c94aa719d9
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VHDL is case insensitive, make sure netlist name is proper
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2024-07-18 16:56:52 +02:00 |
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Emil J. Tywoniak
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72a0380da8
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ast: don't suggest use in external projects
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2024-07-18 16:37:14 +02:00 |
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Akash Levy
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f18ddb5db2
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Remove wide operator control
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2024-07-10 12:53:59 -07:00 |
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Akash Levy
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8f4b66ae77
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Set db_infer_wide_operators externally
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2024-07-08 08:32:34 -07:00 |
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Akash Levy
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70016a08b8
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Disable debug
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2024-07-03 06:55:53 -07:00 |
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Akash Levy
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30241e07eb
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Fix segfault
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2024-07-03 02:29:48 -07:00 |
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Akash Levy
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fcd073ab51
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Smallfix
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2024-07-02 15:13:58 -07:00 |
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Akash Levy
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0596766cbd
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Merge upstream yosys changes
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2024-07-01 18:33:38 -07:00 |
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Akash Levy
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dec43679be
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See if this fixes issues on Innatera design
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2024-06-28 03:13:38 -07:00 |
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gatecat
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22d8df1e7e
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liberty: Support for IO liberty files for verification
Signed-off-by: gatecat <gatecat@ds0.me>
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2024-06-19 21:12:42 +02:00 |
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Akash Levy
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719bbd7523
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Improve SCC reporting
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2024-06-17 14:18:41 -07:00 |
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Miodrag Milanovic
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dfde792288
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Refactored import code
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2024-06-17 14:49:58 +02:00 |
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Miodrag Milanovic
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19da7f7d59
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Update makefile to make options uniform
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2024-06-17 13:29:11 +02:00 |
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Miodrag Milanovic
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0f3f731254
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Handle -work for vhdl, and clean messages
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2024-06-17 13:29:11 +02:00 |
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Miodrag Milanovic
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0a81c8e161
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Import all modules from all libraries when when needed
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2024-06-17 13:29:11 +02:00 |
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Miodrag Milanovic
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7c3094633d
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Compile with hier_tree separate SV and VHDL as well
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2024-06-17 13:29:11 +02:00 |
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Miodrag Milanovic
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e2e189647f
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Cleanup
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2024-06-17 13:29:11 +02:00 |
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Miodrag Milanovic
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7bec332b68
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SV + VHDL with RTL support
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2024-06-17 13:29:11 +02:00 |
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Miodrag Milanovic
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25d50bb2af
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VHDL only build support
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2024-06-17 13:29:11 +02:00 |
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Miodrag Milanovic
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54bf9ccf06
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Add initial support for Verific without additional YosysHQ patch
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2024-06-17 13:29:11 +02:00 |
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Akash Levy
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a0c0384683
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Preserve instances
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2024-06-16 20:20:10 -07:00 |
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Akash Levy
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e23e33441f
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Update yosys from upstream
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2024-06-15 14:23:24 -07:00 |
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Akash Levy
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fce46d2a53
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Add better Yosys/Verific name aliasing and reenable dffe opt
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2024-06-15 14:18:33 -07:00 |
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Akash Levy
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2337d97977
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Sub1 fix
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2024-06-13 15:33:17 -07:00 |
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Akash Levy
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ac0a9e7366
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Updates
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2024-06-10 20:52:11 -07:00 |
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Akash Levy
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b9b776d211
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Update for no preservation of user nets
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2024-06-10 20:33:05 -07:00 |
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Martin Povišer
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b593f5c01c
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Update the overview comment in ast.h
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2024-06-10 16:38:39 +02:00 |
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Akash Levy
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d930310599
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Enable more updates
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2024-06-09 13:54:34 -07:00 |
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Mike Inouye
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b0ab1cf8c3
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Fix memory leak in verific file parsing.
Signed-off-by: Mike Inouye <mikeinouye@google.com>
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2024-06-07 22:51:28 +00:00 |
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Akash Levy
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8499d31cf2
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Revert veri_break_loops setting
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2024-06-07 00:09:01 -07:00 |
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Akash Levy
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c8f7441a4a
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Fix skip default value
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2024-06-05 09:33:03 -07:00 |
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Akash Levy
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c59a997255
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Ignore files properly
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2024-06-05 07:53:21 -07:00 |
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Akash Levy
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4d44099d09
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Support for ignoring translate_off and ignoring files
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2024-06-05 05:00:05 -07:00 |
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Akash Levy
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5dc62bec0b
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Support .inc files and readmemh missing file
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2024-06-03 20:05:30 -07:00 |
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Akash Levy
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92e44cc9a3
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Minor fix to ignore files
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2024-06-03 18:17:50 -07:00 |
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Akash Levy
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4339b3681a
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Elaborate top level modules undo
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2024-06-03 16:17:51 -07:00 |
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Akash Levy
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a692bf17d7
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Improper ignore translates
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2024-06-03 11:23:16 -07:00 |
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Akash Levy
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783c0a593a
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Actually optimize with Verific now
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2024-06-03 04:55:47 -07:00 |
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