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https://github.com/YosysHQ/yosys
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Update yosys from upstream
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commit
e23e33441f
13 changed files with 95 additions and 23 deletions
11
CHANGELOG
11
CHANGELOG
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@ -2,9 +2,18 @@
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List of major changes and improvements between releases
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=======================================================
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Yosys 0.41 .. Yosys 0.42-dev
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Yosys 0.42 .. Yosys 0.43-dev
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--------------------------
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Yosys 0.41 .. Yosys 0.42
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--------------------------
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* New commands and options
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- Added "box_derive" pass to derive box modules.
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- Added option "assert-mod-count" to "select" pass.
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- Added option "-header","-push" and "-pop" to "log" pass.
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* Intel support
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- Dropped Quartus support in "synth_intel_alm" pass.
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Yosys 0.40 .. Yosys 0.41
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--------------------------
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* New commands and options
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5
Makefile
5
Makefile
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@ -140,7 +140,7 @@ LIBS += -lrt
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endif
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endif
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YOSYS_VER := 0.41+129
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YOSYS_VER := 0.42+15
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# Note: We arrange for .gitcommit to contain the (short) commit hash in
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# tarballs generated with git-archive(1) using .gitattributes. The git repo
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@ -155,6 +155,9 @@ endif
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OBJS = kernel/version_$(GIT_REV).o
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bumpversion:
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sed -i "/^YOSYS_VER := / s/+[0-9][0-9]*$$/+`git log --oneline 9b6afcf.. | wc -l`/;" Makefile
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ABCMKARGS = CC="$(CXX)" CXX="$(CXX)" ABC_USE_LIBSTDCXX=1 ABC_USE_NAMESPACE=abc VERBOSE=$(Q)
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# set ABCEXTERNAL = <abc-command> to use an external ABC instance
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@ -1138,7 +1138,7 @@ struct CxxrtlWorker {
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f << indent << "// cell " << cell->name.str() << " syncs\n";
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for (auto conn : cell->connections())
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if (cell->output(conn.first))
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if (is_cxxrtl_sync_port(cell, conn.first)) {
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if (is_cxxrtl_sync_port(cell, conn.first) && !conn.second.empty()) {
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f << indent;
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dump_sigspec_lhs(conn.second, for_debug);
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f << " = " << mangle(cell) << access << mangle_wire_name(conn.first) << ".curr;\n";
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@ -47,7 +47,7 @@ cxxrtl_handle cxxrtl_create_at(cxxrtl_toplevel design, const char *top_path_) {
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cxxrtl_handle handle = new _cxxrtl_handle;
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handle->module = std::move(design->module);
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handle->module->debug_info(handle->objects, top_path);
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handle->module->debug_info(&handle->objects, nullptr, top_path);
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delete design;
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return handle;
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}
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@ -1582,7 +1582,7 @@ struct module {
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// Compatibility method.
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#if __has_attribute(deprecated)
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__attribute__((deprecated("Use `debug_info(path, &items, /*scopes=*/nullptr);` instead. (`path` could be \"top \".)")))
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__attribute__((deprecated("Use `debug_info(&items, /*scopes=*/nullptr, path);` instead.")))
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#endif
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void debug_info(debug_items &items, std::string path) {
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debug_info(&items, /*scopes=*/nullptr, path);
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@ -5,7 +5,7 @@ import os
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project = 'YosysHQ Yosys'
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author = 'YosysHQ GmbH'
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copyright ='2024 YosysHQ GmbH'
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yosys_ver = "0.41"
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yosys_ver = "0.42"
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# select HTML theme
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html_theme = 'furo'
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@ -8,10 +8,40 @@ file format and how you can make your own synthesis scripts.
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Yosys script files typically use the :file:`.ys` extension and contain a set of
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commands for Yosys to run sequentially. These commands are the same ones we
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were using on the previous page like :cmd:ref:`read_verilog` and
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:cmd:ref:`hierarchy`. As with the interactive shell, each command consists of
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the command name, and an optional whitespace separated list of arguments.
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Commands are terminated with the newline character, or by a semicolon (;). Empty
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lines, and lines starting with the hash sign (#), are ignored.
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:cmd:ref:`hierarchy`.
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Script parsing
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~~~~~~~~~~~~~~
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As with the interactive shell, each command consists of the command name, and an
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optional whitespace separated list of arguments. Commands are terminated with
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the newline character, and anything after a hash sign ``#`` is a comment (i.e.
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it is ignored).
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It is also possible to terminate commands with a semicolon ``;``. This is
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particularly useful in conjunction with the ``-p <command>`` command line
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option, where ``<command>`` can be a string with multiple commands separated by
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semicolon. In-line comments can also be made with the colon ``:``, where the end
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of the comment is a semicolon ``;`` or a new line.
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.. code-block::
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:caption: Using the ``-p`` option
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$ yosys -p "read_verilog fifo.v; :this is a comment; prep"
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.. warning::
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The space after the semicolon is required for correct parsing. ``log a;log
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b;`` for example will display ``a;log b`` instead of ``a`` and ``b`` as might
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be expected.
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Another special character that can be used in Yosys scripts is the bang ``!``.
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Anything after the bang will be executed as a shell command. This can only be
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terminated with a new line. Any semicolons, hashes, or other special characters
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will be passed to the shell. If an error code is returned from the shell it
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will be raised by Yosys. :cmd:ref:`exec` provides a much more flexible way of
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executing commands, allowing the output to be logged and more control over when
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to generate errors.
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The synthesis starter script
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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@ -17,12 +17,7 @@
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*
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* ---
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*
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* This is the AST frontend library.
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*
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* The AST frontend library is not a frontend on it's own but provides a
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* generic abstract syntax tree (AST) abstraction for HDL code and can be
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* used by HDL frontends. See "ast.h" for an overview of the API and the
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* Verilog frontend for an usage example.
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* This is support code for the Verilog frontend at frontends/verilog
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*
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*/
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@ -3687,6 +3687,12 @@ struct VerificPass : public Pass {
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verific_error_msg.clear();
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log_cmd_error("Reading Verilog/SystemVerilog sources failed.\n");
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}
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char* fn;
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int i = 0;
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FOREACH_ARRAY_ITEM(&file_names, i, fn) {
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free(fn);
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}
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set_modules_to_blackbox(map, work, flag_lib);
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verific_import_pending = true;
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goto check_error;
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@ -59,7 +59,7 @@ struct LogPass : public Pass {
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log(" -push\n");
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log(" push a new level on the pass counter\n");
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log("\n");
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log(" -push\n");
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log(" -pop\n");
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log(" pop from the pass counter\n");
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log("\n");
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}
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@ -11,3 +11,7 @@ run_subtest () {
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run_subtest value
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run_subtest value_fuzz
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# Compile-only test.
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../../yosys -p "read_verilog test_unconnected_output.v; proc; clean; write_cxxrtl cxxrtl-test-unconnected_output.cc"
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${CC:-gcc} -std=c++11 -c -o cxxrtl-test-unconnected_output -I../../backends/cxxrtl/runtime cxxrtl-test-unconnected_output.cc
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24
tests/cxxrtl/test_unconnected_output.v
Normal file
24
tests/cxxrtl/test_unconnected_output.v
Normal file
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@ -0,0 +1,24 @@
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(* cxxrtl_blackbox *)
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module blackbox(...);
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(* cxxrtl_edge = "p" *)
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input clk;
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(* cxxrtl_sync *)
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output [7:0] out1;
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(* cxxrtl_sync *)
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output [7:0] out2;
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endmodule
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module unconnected_output(
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input clk,
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in,
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output out
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);
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blackbox bb (
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.clock (clock),
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.in (in),
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.out1 (out),
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.out2 (/* unconnected */),
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);
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endmodule
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@ -1,3 +1,4 @@
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#include <cinttypes>
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#include <cstddef>
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#include <cstdint>
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#include <cstdio>
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for (size_t i = 0; i * chunk_bits < Bits; i++) {
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if ((chunk_type)(iresult >> (i * chunk_bits)) != vresult.data[i]) {
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std::printf("Test failure:\n");
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std::printf("Bits: %i\n", Bits);
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std::printf("a: %016lx\n", ia);
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std::printf("b: %016lx\n", ib);
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std::printf("iresult: %016lx\n", iresult);
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std::printf("vresult: %016lx\n", vresult.template get<uint64_t>());
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std::printf("Bits: %zu\n", Bits);
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std::printf("a: %016" PRIx64 "\n", ia);
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std::printf("b: %016" PRIx64 "\n", ib);
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std::printf("iresult: %016" PRIx64 "\n", iresult);
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std::printf("vresult: %016" PRIx64 "\n", vresult.template get<uint64_t>());
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std::terminate();
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}
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}
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}
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std::printf("Test passed @ Bits = %i.\n", Bits);
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std::printf("Test passed @ Bits = %zu.\n", Bits);
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}
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template<typename Operation>
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