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Update yosys from upstream

This commit is contained in:
Akash Levy 2024-06-15 14:23:24 -07:00
commit e23e33441f
13 changed files with 95 additions and 23 deletions

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@ -2,9 +2,18 @@
List of major changes and improvements between releases
=======================================================
Yosys 0.41 .. Yosys 0.42-dev
Yosys 0.42 .. Yosys 0.43-dev
--------------------------
Yosys 0.41 .. Yosys 0.42
--------------------------
* New commands and options
- Added "box_derive" pass to derive box modules.
- Added option "assert-mod-count" to "select" pass.
- Added option "-header","-push" and "-pop" to "log" pass.
* Intel support
- Dropped Quartus support in "synth_intel_alm" pass.
Yosys 0.40 .. Yosys 0.41
--------------------------
* New commands and options

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@ -140,7 +140,7 @@ LIBS += -lrt
endif
endif
YOSYS_VER := 0.41+129
YOSYS_VER := 0.42+15
# Note: We arrange for .gitcommit to contain the (short) commit hash in
# tarballs generated with git-archive(1) using .gitattributes. The git repo
@ -155,6 +155,9 @@ endif
OBJS = kernel/version_$(GIT_REV).o
bumpversion:
sed -i "/^YOSYS_VER := / s/+[0-9][0-9]*$$/+`git log --oneline 9b6afcf.. | wc -l`/;" Makefile
ABCMKARGS = CC="$(CXX)" CXX="$(CXX)" ABC_USE_LIBSTDCXX=1 ABC_USE_NAMESPACE=abc VERBOSE=$(Q)
# set ABCEXTERNAL = <abc-command> to use an external ABC instance

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@ -1138,7 +1138,7 @@ struct CxxrtlWorker {
f << indent << "// cell " << cell->name.str() << " syncs\n";
for (auto conn : cell->connections())
if (cell->output(conn.first))
if (is_cxxrtl_sync_port(cell, conn.first)) {
if (is_cxxrtl_sync_port(cell, conn.first) && !conn.second.empty()) {
f << indent;
dump_sigspec_lhs(conn.second, for_debug);
f << " = " << mangle(cell) << access << mangle_wire_name(conn.first) << ".curr;\n";

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@ -47,7 +47,7 @@ cxxrtl_handle cxxrtl_create_at(cxxrtl_toplevel design, const char *top_path_) {
cxxrtl_handle handle = new _cxxrtl_handle;
handle->module = std::move(design->module);
handle->module->debug_info(handle->objects, top_path);
handle->module->debug_info(&handle->objects, nullptr, top_path);
delete design;
return handle;
}

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@ -1582,7 +1582,7 @@ struct module {
// Compatibility method.
#if __has_attribute(deprecated)
__attribute__((deprecated("Use `debug_info(path, &items, /*scopes=*/nullptr);` instead. (`path` could be \"top \".)")))
__attribute__((deprecated("Use `debug_info(&items, /*scopes=*/nullptr, path);` instead.")))
#endif
void debug_info(debug_items &items, std::string path) {
debug_info(&items, /*scopes=*/nullptr, path);

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@ -5,7 +5,7 @@ import os
project = 'YosysHQ Yosys'
author = 'YosysHQ GmbH'
copyright ='2024 YosysHQ GmbH'
yosys_ver = "0.41"
yosys_ver = "0.42"
# select HTML theme
html_theme = 'furo'

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@ -8,10 +8,40 @@ file format and how you can make your own synthesis scripts.
Yosys script files typically use the :file:`.ys` extension and contain a set of
commands for Yosys to run sequentially. These commands are the same ones we
were using on the previous page like :cmd:ref:`read_verilog` and
:cmd:ref:`hierarchy`. As with the interactive shell, each command consists of
the command name, and an optional whitespace separated list of arguments.
Commands are terminated with the newline character, or by a semicolon (;). Empty
lines, and lines starting with the hash sign (#), are ignored.
:cmd:ref:`hierarchy`.
Script parsing
~~~~~~~~~~~~~~
As with the interactive shell, each command consists of the command name, and an
optional whitespace separated list of arguments. Commands are terminated with
the newline character, and anything after a hash sign ``#`` is a comment (i.e.
it is ignored).
It is also possible to terminate commands with a semicolon ``;``. This is
particularly useful in conjunction with the ``-p <command>`` command line
option, where ``<command>`` can be a string with multiple commands separated by
semicolon. In-line comments can also be made with the colon ``:``, where the end
of the comment is a semicolon ``;`` or a new line.
.. code-block::
:caption: Using the ``-p`` option
$ yosys -p "read_verilog fifo.v; :this is a comment; prep"
.. warning::
The space after the semicolon is required for correct parsing. ``log a;log
b;`` for example will display ``a;log b`` instead of ``a`` and ``b`` as might
be expected.
Another special character that can be used in Yosys scripts is the bang ``!``.
Anything after the bang will be executed as a shell command. This can only be
terminated with a new line. Any semicolons, hashes, or other special characters
will be passed to the shell. If an error code is returned from the shell it
will be raised by Yosys. :cmd:ref:`exec` provides a much more flexible way of
executing commands, allowing the output to be logged and more control over when
to generate errors.
The synthesis starter script
~~~~~~~~~~~~~~~~~~~~~~~~~~~~

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@ -17,12 +17,7 @@
*
* ---
*
* This is the AST frontend library.
*
* The AST frontend library is not a frontend on it's own but provides a
* generic abstract syntax tree (AST) abstraction for HDL code and can be
* used by HDL frontends. See "ast.h" for an overview of the API and the
* Verilog frontend for an usage example.
* This is support code for the Verilog frontend at frontends/verilog
*
*/

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@ -3687,6 +3687,12 @@ struct VerificPass : public Pass {
verific_error_msg.clear();
log_cmd_error("Reading Verilog/SystemVerilog sources failed.\n");
}
char* fn;
int i = 0;
FOREACH_ARRAY_ITEM(&file_names, i, fn) {
free(fn);
}
set_modules_to_blackbox(map, work, flag_lib);
verific_import_pending = true;
goto check_error;

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@ -59,7 +59,7 @@ struct LogPass : public Pass {
log(" -push\n");
log(" push a new level on the pass counter\n");
log("\n");
log(" -push\n");
log(" -pop\n");
log(" pop from the pass counter\n");
log("\n");
}

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@ -11,3 +11,7 @@ run_subtest () {
run_subtest value
run_subtest value_fuzz
# Compile-only test.
../../yosys -p "read_verilog test_unconnected_output.v; proc; clean; write_cxxrtl cxxrtl-test-unconnected_output.cc"
${CC:-gcc} -std=c++11 -c -o cxxrtl-test-unconnected_output -I../../backends/cxxrtl/runtime cxxrtl-test-unconnected_output.cc

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@ -0,0 +1,24 @@
(* cxxrtl_blackbox *)
module blackbox(...);
(* cxxrtl_edge = "p" *)
input clk;
(* cxxrtl_sync *)
output [7:0] out1;
(* cxxrtl_sync *)
output [7:0] out2;
endmodule
module unconnected_output(
input clk,
in,
output out
);
blackbox bb (
.clock (clock),
.in (in),
.out1 (out),
.out2 (/* unconnected */),
);
endmodule

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@ -1,3 +1,4 @@
#include <cinttypes>
#include <cstddef>
#include <cstdint>
#include <cstdio>
@ -62,17 +63,17 @@ void test_binary_operation_for_bitsize(Operation &op)
for (size_t i = 0; i * chunk_bits < Bits; i++) {
if ((chunk_type)(iresult >> (i * chunk_bits)) != vresult.data[i]) {
std::printf("Test failure:\n");
std::printf("Bits: %i\n", Bits);
std::printf("a: %016lx\n", ia);
std::printf("b: %016lx\n", ib);
std::printf("iresult: %016lx\n", iresult);
std::printf("vresult: %016lx\n", vresult.template get<uint64_t>());
std::printf("Bits: %zu\n", Bits);
std::printf("a: %016" PRIx64 "\n", ia);
std::printf("b: %016" PRIx64 "\n", ib);
std::printf("iresult: %016" PRIx64 "\n", iresult);
std::printf("vresult: %016" PRIx64 "\n", vresult.template get<uint64_t>());
std::terminate();
}
}
}
std::printf("Test passed @ Bits = %i.\n", Bits);
std::printf("Test passed @ Bits = %zu.\n", Bits);
}
template<typename Operation>