KrystalDelusion
687cffb806
Merge f17a6e118a into ff98e51c13
2025-03-26 14:03:38 +00:00
George Rennie
ff98e51c13
Merge pull request #317 from SeddonShen/main
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feat(sby_engine_aiger): add rIC3 support for BMC mode
2025-03-26 10:17:15 +01:00
SeddonShen
ca93e43cec
feat(sby_engine_aiger): add rIC3 support for BMC mode
2025-03-18 16:06:16 +08:00
George Rennie
20ee439df9
Merge pull request #313 from gipsyh/rIC3
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Support rIC3 model checker as backend
2025-03-14 15:13:06 +01:00
Yuheng Su
fc0afb04c5
Set minimum rIC3 version to 1.35
2025-03-14 22:00:09 +08:00
N. Engelhardt
9675d158ce
Merge pull request #264 from YosysHQ/krys/vhd_example
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Add formal_bind example
2025-03-03 15:20:59 +00:00
Miodrag Milanović
b6be8ad0fc
Merge pull request #311 from sporniket/patch-2
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[docs] Fixes instructions for installing boolector
2025-03-03 16:15:59 +01:00
N. Engelhardt
44c44097f8
Merge pull request #310 from sporniket/patch-1
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[docs] instruct to clone yosys with '--recurse-submodules'
2025-03-03 15:11:05 +00:00
N. Engelhardt
4d92762d5a
Merge pull request #278 from YosysHQ/krys/docs_verific
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Add note on docs to clarify verific support
2025-03-03 15:09:36 +00:00
Yuheng Su
8da7174b16
update rIC3 backend
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Signed-off-by: Yuheng Su <gipsyh.icu@gmail.com>
2024-12-17 04:41:58 +00:00
Yuheng Su
daf4e4cb39
Support rIC3 as backend
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Signed-off-by: Yuheng Su <gipsyh.icu@gmail.com>
2024-12-16 11:02:45 +00:00
David SPORN
8885582e3c
[docs] Fixes instructions for installing boolector
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There is a `build` folder where `bin\btorsim` is generated
2024-11-19 07:20:08 +01:00
David SPORN
7fc7ed38ae
[docs] instruct to clone yosys with '--recurse-submodules'
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Without using '--recurse-submodule', make fails to retrieve them before building.
2024-11-19 06:58:01 +01:00
N. Engelhardt
26b387466d
Merge pull request #308 from YosysHQ/krys/drop_ilang
2024-11-07 17:33:53 +01:00
Krystine Sherwin
176e59c3d8
Replace (read_)ilang with (read_)rtlil
2024-11-05 12:55:09 +13:00
N. Engelhardt
daed0e1544
Merge pull request #302 from YosysHQ/fix_mangle_lookup
2024-10-17 11:15:01 +02:00
Miodrag Milanovic
94d1d0aa2f
enable extensions
2024-10-16 17:14:42 +02:00
N. Engelhardt
e84cc443bd
add non-verific name mangling regression test
2024-10-16 15:05:02 +02:00
N. Engelhardt
0f13fc6bc7
fix lookup of mangled path names
2024-10-16 13:56:36 +02:00
Jannis Harder
117fb26c68
Merge pull request #298 from YosysHQ/george/smtbmc_paths
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smtbmc: match on full property paths instead of just names
2024-10-07 20:36:27 +02:00
Jannis Harder
62d17081bf
Merge pull request #276 from YosysHQ/krys/test-furo-ys
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Use furo-ys
2024-09-27 14:21:07 +02:00
George Rennie
9583985d06
smtbmc: match on full property paths instead of just names
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* to address #296
* this also required some changes to the formatting of the output from
smtbmc to allow more unambiguous parsing, so corresponds to a matching
change in yosys
2024-09-24 03:13:07 +01:00
Miodrag Milanović
d9a5845323
Merge pull request #297 from jix/imctk-eqy-engine
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Add support for the imctk-eqy-engine
2024-09-16 17:39:53 +02:00
Jannis Harder
8bd07192ac
Merge pull request #294 from YosysHQ/george/aigbmc_docs
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docs: fix reference to aigbmc engine option
2024-09-09 10:20:54 +02:00
Jannis Harder
b8a001eab2
Add support for the imctk-eqy-engine
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This is not added to the documentation, as this is currently intended
for internal use only.
2024-09-08 16:04:26 +02:00
Miodrag Milanović
67a7821946
CI force fast runner
2024-08-19 11:26:44 +02:00
George Rennie
07b9b7cbb8
docs: fix reference to aigbmc engine option
2024-08-01 17:34:54 +01:00
Miodrag Milanović
61ca4de2da
Merge pull request #284 from jix/remember-installed-version
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Add --version option based on git describe
2024-07-08 19:05:16 +02:00
Jannis Harder
8709c8a8ee
Add --version option based on git describe
2024-07-08 18:39:23 +02:00
Jannis Harder
c9e3b8224a
Merge pull request #275 from YosysHQ/micko/pr_template
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Add PR template
2024-06-14 18:18:25 +02:00
Krystine Sherwin
0fab912005
Docs: Use sby role shortcut
2024-06-10 18:46:31 +12:00
Krystine Sherwin
a3844d4a30
Docs: Use sby lexer
2024-06-10 18:41:15 +12:00
Krystine Sherwin
5426bee107
Use furo-ys
2024-05-14 12:54:30 +12:00
Krystine Sherwin
7f1853bd78
Add note on docs to clarify verific support
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Having a verific license does not provide access to the verific frontend. This helps to make that clearer.
2024-05-14 12:25:29 +12:00
Miodrag Milanović
641d5d55fa
Merge pull request #277 from YosysHQ/krys/fix-ci
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Fix failing `build_verific`
2024-05-09 07:27:12 +02:00
Krystine Sherwin
0a6a484760
ci: Checkout Yosys with submodules
2024-05-09 13:12:36 +12:00
Miodrag Milanovic
d8904f47ea
Add PR template
2024-05-08 11:13:56 +02:00
Jannis Harder
7dd287f287
Merge pull request #274 from jix/abc-prep
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abc: Support arbitrary prep abc commands
2024-04-24 09:43:00 +02:00
Jannis Harder
e0dda21555
abc: Support arbitrary prep abc commands
2024-04-19 16:40:30 +02:00
Miodrag Milanović
415f404513
Merge pull request #273 from YosysHQ/ci
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Update CI scripts
2024-04-10 18:39:05 +02:00
Miodrag Milanovic
dfd4c8c734
Update CI scripts
2024-04-10 13:36:05 +02:00
Krystine Sherwin
f17a6e118a
btor2aiger: Add test
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Based on fifo.sby, running both with and without `btor_aig on`, as well as combined with `vcd_sim on` (after an earlier version had issues when using `vcd_sim off`).
Has both pass and fail checks, so should be able to catch any major issues, although it doesn't fully check equivalence.
2024-04-06 13:56:43 +13:00
Krystine Sherwin
c081a8a754
btor2aiger: Use asserts and assumes from .ywb file
2024-04-06 13:40:01 +13:00
Krystine Sherwin
b68f68d26b
btor2aiger: Install btor2aig_yw
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Install alongside SBY.
Add env helper to python source.
Fix hardcoded path in `sby_core.py`.
2024-04-06 13:40:01 +13:00
Krystine Sherwin
143d03a66e
btor2aiger: Use ywa inits list
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`btor2aiger` tool restarts latch indexing at 0 but aiw2yw expects index to be unique. Offset latch input number by the total input count to fix this.
2024-04-06 13:40:01 +13:00
Krystine Sherwin
b7bb1466d2
Pre-format conditional flags in write_btor
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Make `-x` flag dependent on `btor_aig on`, and combine with `-c` flag into single `btor_flags` string.
2024-04-06 13:40:01 +13:00
Krystine Sherwin
99e704e6cb
btor2aiger: Get assertions from .btor file
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Assertions show up in the .btor file as 'bad' statements, assuming btor2aiger maintains the same order this should get us the list of assertions in the order they appear in the .aig file.
2024-04-06 13:40:01 +13:00
Krystine Sherwin
10332e8e74
btor2aiger: It kinda works?
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- Add `btor2aig_yw.py` to wrap btor2aiger calls, splitting the symbol map into a
`.aim` file and building (and approximation of) the `.ywa` file.
- Currently not tracking asserts/assumes in the `.ywa`, and yosys-witness isn't
the biggest fan of the btor2aiger style of unitialised latches. As such, the
latches are declared but the `.yw` output doesn't do anything with them so
it's incomplete. But the vcd output seems fine (for `vcd_sim=on|off`).
- Add a try/except to catch property matching with an incomplete property list.
- Add `-x` flag to `write_btor` call since aiw2yw gets confused without them.
- Includes some TODO reminders for me to fix things, but as far as I can tell it
is working.
2024-04-06 13:40:00 +13:00
Krystine Sherwin
9236b8420e
btor2aiger: Initial version
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Add `btor_aig` option, which uses `model("btor_nomem")` and btor2aiger to generate an aiger file via btor.
Seems to run fine, until it tries to access design_aiger.ywa for trace conversion.
2024-04-06 13:40:00 +13:00
N. Engelhardt
b84cd93ea0
Merge pull request #271 from YosysHQ/aiju/issue-269
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Fixes issue #269 by removing an erroneous "if sbyfile" check.
2024-04-05 13:02:13 +02:00
