Jacob Lifshay
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4422157db8
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WIP adding enums to simulator
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2024-12-02 21:06:23 -08:00 |
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Jacob Lifshay
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d3f52292a1
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test doc tests in CI
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2024-12-01 20:21:26 -08:00 |
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Jacob Lifshay
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fd45465d35
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sim: add support for registers
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2024-12-01 20:14:13 -08:00 |
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Jacob Lifshay
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5e0548db26
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vcd: single bit signals have no spaces in their value changes
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2024-12-01 20:12:43 -08:00 |
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Jacob Lifshay
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12b3ba57f1
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add some ExprCastTo supertraits to ResetType to make generic code easier
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2024-12-01 20:10:25 -08:00 |
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Jacob Lifshay
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965fe53077
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deduce_resets: show more debugging info on assertion failure
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2024-12-01 20:09:17 -08:00 |
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Jacob Lifshay
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3abba7f9eb
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simulating circuits with deduced resets works
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2024-11-27 23:52:07 -08:00 |
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Jacob Lifshay
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6446b71afd
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deduce_resets works!
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2024-11-27 23:24:11 -08:00 |
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Jacob Lifshay
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d36cf92d7f
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make ToReset generic over the reset type
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2024-11-27 23:19:55 -08:00 |
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Jacob Lifshay
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d744d85c66
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working on deduce_resets
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/ test (pull_request) Successful in 5m3s
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2024-11-27 01:31:18 -08:00 |
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Jacob Lifshay
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358cdd10c8
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add more expr casts
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2024-11-27 01:30:28 -08:00 |
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Jacob Lifshay
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9128a84284
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Merge remote-tracking branch 'origin/master' into adding-simulator
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2024-11-26 21:28:22 -08:00 |
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Jacob Lifshay
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546010739a
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working on deduce_resets
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2024-11-26 21:26:56 -08:00 |
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Jacob Lifshay
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9b5f1218fd
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make ClockDomain and Reg generic over reset type
/ deps (push) Successful in 15s
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/ test (pull_request) Successful in 4m55s
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2024-11-26 20:47:03 -08:00 |
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Jacob Lifshay
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89d84551f8
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add ResetType to the list of recognized type bounds
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2024-11-26 18:52:03 -08:00 |
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Jacob Lifshay
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c45624e3c2
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Fix SInt::for_value not accounting for sign bit for positive values
/ deps (pull_request) Successful in 14s
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/ deps (push) Successful in 13s
/ test (push) Successful in 4m39s
Fixes: #4
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2024-11-26 16:26:29 -08:00 |
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Jacob Lifshay
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7851bf545c
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working on deduce_resets.rs
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2024-11-26 00:07:11 -08:00 |
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Jacob Lifshay
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3e3da53bd2
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working on deduce_resets
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/ test (pull_request) Successful in 4m53s
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2024-11-25 00:01:02 -08:00 |
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Jacob Lifshay
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fa50930ff8
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update petgraph dependency to include UnionFind::new_set()
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2024-11-25 00:00:26 -08:00 |
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Jacob Lifshay
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9516fe03a1
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increase rust version in CI too
/ deps (push) Successful in 15s
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2024-11-24 14:46:25 -08:00 |
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Jacob Lifshay
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52ab134673
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increase rust version to support omitting match arms with uninhabited types
/ deps (push) Successful in 17s
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/ test (pull_request) Failing after 1m17s
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2024-11-24 14:41:39 -08:00 |
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Jacob Lifshay
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698b8adc23
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working on deduce_resets pass
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2024-11-24 14:39:32 -08:00 |
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Jacob Lifshay
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59be3bd645
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WIP working on implementing deduce_resets pass
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2024-11-24 03:44:31 -08:00 |
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Jacob Lifshay
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913baa37e9
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WIP adding deduce_resets pass
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/ deps (pull_request) Successful in 13s
/ test (pull_request) Successful in 4m45s
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2024-11-22 16:07:18 -08:00 |
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Jacob Lifshay
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11ddbc43c7
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writing VCD for combinatorial circuits works!
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/ test (pull_request) Successful in 4m45s
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2024-11-20 22:53:54 -08:00 |
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Jacob Lifshay
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c4b5d00419
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WIP adding VCD output
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2024-11-20 22:53:54 -08:00 |
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Jacob Lifshay
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09aa9fbc78
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wire up simulator trace writing interface
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2024-11-20 22:53:54 -08:00 |
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Jacob Lifshay
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288a6b71b9
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WIP adding VCD output
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2024-11-20 22:53:54 -08:00 |
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Jacob Lifshay
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0095570f19
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simple combinatorial simulation works!
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2024-11-20 22:53:54 -08:00 |
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Jacob Lifshay
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f54e55a143
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Simulation::settle_step() works for simple modules
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2024-11-20 22:53:54 -08:00 |
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Jacob Lifshay
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a6e40839ac
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simulator WIP: use petgraph for topological sort over assignments
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2024-11-20 22:53:54 -08:00 |
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Jacob Lifshay
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3106a6fff6
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working on simulator...
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2024-11-20 22:53:54 -08:00 |
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Jacob Lifshay
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f338f37d3e
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working on simulator
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2024-11-20 22:53:54 -08:00 |
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Jacob Lifshay
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277d3e0d4d
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working on simulator
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2024-11-20 22:53:54 -08:00 |
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Jacob Lifshay
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b288d6f8f2
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add missing copyright headers
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2024-11-20 22:53:54 -08:00 |
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Jacob Lifshay
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479d59b287
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WIP implementing simulator
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2024-11-20 22:53:54 -08:00 |
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Jacob Lifshay
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6f904148c4
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WIP adding simulator
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2024-11-20 22:53:54 -08:00 |
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Jacob Lifshay
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3ea0d98924
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always write formal cache json
/ deps (push) Successful in 15s
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2024-11-20 22:51:40 -08:00 |
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Cesar Strauss
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c1f1a8b749
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Add test module exercising formal verification.
/ deps (pull_request) Successful in 15s
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2024-11-20 18:29:39 -03:00 |
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Jacob Lifshay
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3d5d8c54b6
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add repository to cache key
/ deps (push) Successful in 10m39s
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2024-10-30 20:55:02 -07:00 |
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Jacob Lifshay
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ee15fd2b94
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support #[hdl] type aliases
/ deps (push) Successful in 11m28s
/ test (push) Successful in 4m40s
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2024-10-30 20:47:10 -07:00 |
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Jacob Lifshay
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20cf0abbcc
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fix using #[hdl] types like S<{ 1 + 2 }>
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2024-10-30 20:46:11 -07:00 |
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Jacob Lifshay
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5bd0de48b7
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change to version 0.2.1
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2024-10-30 19:36:05 -07:00 |
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Jacob Lifshay
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0c9c48a066
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split out deps into separate workflow with better caching using deps.yml from cpu.git
/ deps (push) Successful in 21s
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2024-10-17 21:05:18 -07:00 |
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Jacob Lifshay
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cb17913004
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limit sby to one thread each since it seems not to respect job count in parallel mode
/ test (push) Successful in 46m32s
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2024-10-15 21:32:38 -07:00 |
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Jacob Lifshay
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42effd1132
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switch to using a make job server for managing test parallelism
/ test (push) Failing after 39m16s
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2024-10-15 20:32:33 -07:00 |
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Jacob Lifshay
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3d0f95cfe5
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formal: add workaround for wires disappearing because yosys optimizes them out
/ test (push) Successful in 39m13s
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2024-10-15 01:48:48 -07:00 |
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Jacob Lifshay
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3939ce2360
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add Bundle and Enum to prelude
/ test (push) Successful in 39m33s
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2024-10-14 17:47:58 -07:00 |
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Jacob Lifshay
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d0229fbcfb
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get #[hdl] struct S<A: KnownSize, B: KnownSize> to work
/ test (push) Successful in 39m2s
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2024-10-11 17:30:49 -07:00 |
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Jacob Lifshay
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4909724995
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add more thorough checks that bounds are properly handled on #[hdl] structs
/ test (push) Successful in 37m37s
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2024-10-10 23:34:46 -07:00 |
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