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14851 commits 95 branches 53 tags 45 MiB
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Author SHA1 Message Date
Martin Povišer
373e7a1485 aiger2: Fix print 2024-10-07 12:03:49 +02:00
Martin Povišer
ebe51e206e aiger2: Fix warnings 2024-10-07 12:03:49 +02:00
Martin Povišer
2e587c835f abc9_exe: Document SC mapping options 2024-10-07 12:03:49 +02:00
Martin Povišer
3b6dcc7bd0 abc9_exe: Remove -genlib option 2024-10-07 12:03:49 +02:00
Martin Povišer
ac79a052ba aiger2: Adjust help 2024-10-07 12:03:49 +02:00
Martin Povišer
81688e3ba2 aigsize: Remove 2024-10-07 12:03:49 +02:00
Martin Povišer
e0a86d5483 abc_new: Start new command for aiger2-based round trip 2024-10-07 12:03:49 +02:00
Martin Povišer
b8f389370b aiger2: Convert x-states to zeroes 2024-10-07 12:03:48 +02:00
Martin Povišer
4c0a8a1326 aiger2: Add analysis step to order boxes 2024-10-07 12:03:48 +02:00
Martin Povišer
f7c7371ea9 aiger2: Fix relative ordering of PI/POs and box I/Os 2024-10-07 12:03:48 +02:00
Martin Povišer
8d12492610 read_xaiger2: Fix detecting the end of extensions 2024-10-07 12:03:48 +02:00
Martin Povišer
2b1b5652f1 Adjust read_xaiger2 prints 2024-10-07 12:03:48 +02:00
Martin Povišer
e58a9b6ab6 abc9: Understand ASIC options similar to abc 2024-10-07 12:03:48 +02:00
Martin Povišer
d4e009fc2f aiger2: Add TODO 2024-10-07 12:03:48 +02:00
KrystalDelusion
f72d0219d1
Update test-build.yml 
Call make docs from root
 2024-10-07 22:52:33 +13:00
Krystine Sherwin
33930e44ac
ci: Test build docs 2024-10-07 22:22:10 +13:00
Krystine Sherwin
edf29e725e
Docs: Add functional_ir to index 2024-10-07 22:20:22 +13:00
Emil J. Tywoniak
3e6e8c892e Bump abc submodule 2024-10-07 11:09:02 +02:00
Emil J
1f517d6c7d
Merge pull request #4553 from donn/python_scriptfile 
-y flag for libyosys Python scripts
 2024-10-07 11:02:40 +02:00
Krystine Sherwin
13d7b5fd6a
Docs: Ignore example outputs 2024-10-07 22:01:56 +13:00
Krystine Sherwin
0b1b94d85e
Docs: Clean example outputs 2024-10-07 22:00:28 +13:00
Krystine Sherwin
468a019c30
docs: Makefile tidying 
examples and dots are now orthogonal.
 2024-10-07 21:56:23 +13:00
Krystine Sherwin
2e1181a092
ci: Run make docs on PRs 2024-10-07 21:25:15 +13:00
github-actions[bot]
6155c59d00 Bump version 2024-10-07 00:21:37 +00:00
KrystalDelusion
3534e6b52d
Merge pull request #4632 from tarikgraba/main 
docs: avoid concurrency issues when generating images in parallel
 2024-10-07 10:33:02 +13:00
Krystine Sherwin
571d181fb4
Fix top-level make docs prerequisites 
Add `$(TARGETS)` for gen_examples and gen_images since they need the `yosys` executable.
Add guidelines source files as a prerequisite to docs/source/generated while we're at it.
 2024-10-07 10:26:29 +13:00
Krystine Sherwin
d8038c11d1
Add -j flag to make docs CI 2024-10-07 10:07:17 +13:00
TG
5841b44543 docs: Simplify images generation to allow parallel build 
- remove the tidy target from the main target.
  * aux/log file are already excluded in a .gititgnore file
  * allow parallel generation as the tidy target imposes sequential build
 2024-10-06 08:38:16 +02:00
Akash Levy
db55bbaf81 Add Liberty tests to test suite 2024-10-05 01:35:12 -10:00
Akash Levy
f76cb43ac7 Add bundle support 2024-10-05 01:35:03 -10:00
Akash Levy
36e57017fe Add Liberty to verilog conversion tests 2024-10-05 01:34:12 -10:00
Akash Levy
4de5e718ed Add two new Liberty test cases 2024-10-05 01:33:56 -10:00
Lofty
13ecbd5c76 quicklogic: test that dividing by a constant does not infer carry chains 2024-10-03 20:05:28 +01:00
Akash Levy
654e92e04e Fix Liberty issue 2024-10-03 04:14:20 -07:00
Akash Levy
dd487ca8a1 Updating Yosys 2024-10-03 01:46:09 -07:00
Akash Levy
5038bfa2af Fix minor whitespace thing 2024-10-03 00:29:16 -07:00
Akash Levy
195fff098b Small updates 2024-10-03 00:19:11 -07:00
Akash Levy
2d8588f15b Update Verific 2024-10-02 23:09:36 -07:00
Akash Levy
bc317a3930 Update deps 2024-10-02 22:19:14 -07:00
Akash Levy
ec296736f5 Simplify multiport 2024-10-02 22:19:09 -07:00
Akash Levy
e8d9622a59 wreduce test works now 2024-10-02 17:25:57 -07:00
Akash Levy
03f76bbddd Remove comments 2024-10-02 16:59:01 -07:00
Akash Levy
dd7e302aaa Revert wreduce 2024-10-02 03:55:19 -07:00
Akash Levy
400ae0bbab Prune RAM dimensions 2024-10-02 03:44:57 -07:00
Akash Levy
8bf86e8d1f Undo 2024-10-02 03:30:30 -07:00
Roland Coeurjoly
5ea2c6e6e5 Assume x values for missing signal data in FST 
Co-authored-by: Miodrag Milanovic <mmicko@gmail.com>
Co-authored-by: Roland Coeurjoly <rolandcoeurjoly@gmail.com>
 2024-10-02 12:08:48 +02:00
Martin Povišer
ec42b42bd9 cellmatch: Size the lut attribute 2024-10-02 11:29:54 +02:00
Akash Levy
ff0fd570d8 Revert mem but fix Verific frontend to remove ugliness 2024-10-02 01:17:01 -07:00
Akash Levy
afe3b18a04 Another try on mem fix 2024-10-01 21:57:59 -07:00
Akash Levy
73902607cd Smallfix test 2024-10-01 07:46:56 -07:00