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Code Activity
6126 commits 122 branches 59 tags 72 MiB
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1903 commits

Author SHA1 Message Date
David Shah
ac6cc88db3 memory_bram: Fix multiclock make_transp 
Signed-off-by: David Shah <dave@ds0.me>
 2019-03-24 16:21:36 +00:00
Eddie Hung
2507d01b03 Add a pmux-to-shiftx optimisation to proc_mux 2019-03-23 16:45:36 -07:00
Eddie Hung
bf83c074c8 Cope with SHREG not having E port; Revert $pmux fine tune 2019-03-23 16:09:38 -07:00
Clifford Wolf
ccfa2fe01c Add "mutate -none -mode", "mutate -mode none" 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-03-23 20:20:32 +01:00
Clifford Wolf
59c44bb61a Add "mutate -s <filename>" 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-03-23 17:53:09 +01:00
Eddie Hung
098bd5758f Add support for SHREGMAP+$mux, also fine tune $pmux 2019-03-22 23:22:19 -07:00
Eddie Hung
0895093c7c Leftover printf 2019-03-22 19:14:04 -07:00
Eddie Hung
456295eb66 Fixes for multibit 2019-03-22 18:32:42 -07:00
Eddie Hung
03d108cd1f Working for 1 bit 2019-03-22 17:46:49 -07:00
Eddie Hung
46753cf89f Merge remote-tracking branch 'origin/master' into xc7srl 2019-03-22 13:10:42 -07:00
Clifford Wolf
7cfd83c341 Trim init attributes when resizing FFs in "wreduce", fixes #887 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-03-22 11:42:19 +01:00
Eddie Hung
5597270b9e Opt 2019-03-21 10:20:27 -07:00
Eddie Hung
2b911e270b Fix spacing 2019-03-20 12:28:39 -07:00
Eddie Hung
505e4c2d59 Revert $__SHREG_ to orig; use $__XILINX_SHREG for variable length 2019-03-19 21:58:05 -07:00
Eddie Hung
5445cd4d00 Add support for variable length Xilinx SRL > 128 2019-03-19 17:44:33 -07:00
Eddie Hung
4cd8f02973 shregmap -tech xilinx to delete $shiftx for var length SRL 2019-03-19 15:05:08 -07:00
Eddie Hung
24553326dd Merge remote-tracking branch 'origin/master' into xc7srl 2019-03-19 13:11:30 -07:00
Eddie Hung
0ea7eba5f1 Make output port a non chain user 2019-03-19 13:08:43 -07:00
Eddie Hung
ed32119d13 Fix shregmap to correctly recognise non chain users; cleanup 2019-03-18 16:12:19 -07:00
Eddie Hung
b94db54664 shiftx NULL pointer check 2019-03-18 13:35:54 -07:00
Eddie Hung
d6d9ef0fee Cleanup 2019-03-16 12:49:46 -07:00
Eddie Hung
fadeadb8c8 Only accept <128 for variable length, only if $shiftx exclusive 2019-03-16 08:51:13 -07:00
Eddie Hung
06f8f2654a Working 2019-03-15 19:13:40 -07:00
Clifford Wolf
aa65d3fe65 Improve mix of src/wire/wirebit coverage in "mutate -list" 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-03-16 00:55:46 +01:00
Clifford Wolf
dacaebae35 Add "fmcombine -fwd -bwd -nop" 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-03-15 21:45:37 +01:00
Clifford Wolf
370db33a4c Add fmcombine pass 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-03-15 20:46:17 +01:00
Clifford Wolf
d1985f6a22 Improvements in "mutate" list-reduce algorithm 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-03-15 00:18:31 +01:00
Clifford Wolf
27a5d9c91e Add "mutate -cfg", improve pick_cover behavior 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-03-14 23:20:41 +01:00
Clifford Wolf
4d304e3da7 Add a strictly coverage-driven mutation selection strategy 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-03-14 23:01:55 +01:00
Clifford Wolf
2a4263a75d Improve "mutate" wire coverage metric 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-03-14 23:01:01 +01:00
Clifford Wolf
1b4fdbb0d8 Add more mutation types, improve mutation src cover 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-03-14 22:04:42 +01:00
Clifford Wolf
6ad5d036c5 Add "mutate" command DB reduce functionality 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-03-14 22:04:42 +01:00
Clifford Wolf
8e6b69d7bb Add "mutate -mode inv", various other mutate improvements 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-03-14 22:04:42 +01:00
Clifford Wolf
ea8ee24140 Add basic "mutate -list N" framework 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-03-14 22:04:42 +01:00
Clifford Wolf
f806b95ed6 Improve handling of and-with-1 and or-with-0 in opt_expr, fixes #327 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-03-14 20:52:00 +01:00
Eddie Hung
8af9979aab Revert "Add shregmap -init_msb_first and use in synth_xilinx" 
This reverts commit 26ecbc1aee.
 2019-03-14 09:01:48 -07:00
Eddie Hung
f1a8e8a480 Merge remote-tracking branch 'origin/master' into xc7srl 2019-03-14 08:59:19 -07:00
Eddie Hung
26ecbc1aee Add shregmap -init_msb_first and use in synth_xilinx 2019-03-14 08:10:02 -07:00
Clifford Wolf
399ab16315 Add $dffsr support to async2sync 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-03-09 11:52:00 -08:00
Eddie Hung
d03780c3f4
Fix spelling in pmgen/README.md 2019-03-05 17:55:29 -08:00
Clifford Wolf
ae9286386d Only run derive on blackbox modules when ports have dynamic size 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-03-02 12:36:46 -08:00
Larry Doolittle
57f8bb471f Try again for passes/pmgen/ice40_dsp_pm.h rule 
Tested on both in-tree and out-of-tree builds
 2019-03-01 20:20:53 -08:00
Clifford Wolf
e847690bda Fix multiple issues in wreduce FF handling, fixes #835 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-02-28 17:24:46 -08:00
Larry Doolittle
e2fc18f27b Reduce amount of trailing whitespace in code base 2019-02-28 14:58:11 -08:00
Clifford Wolf
68a6937173 Fix pmgen for in-tree builds 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-02-28 14:56:05 -08:00
Clifford Wolf
64d91219b4 Fix pmgen for out-of-tree build 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-02-28 14:00:58 -08:00
Clifford Wolf
63be3f3bab Improvements in "supercover" pass 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-02-27 11:45:13 -08:00
Clifford Wolf
a58dbcf2ba Add "supercover" skeleton 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
 2019-02-27 11:37:08 -08:00
Eddie Hung
f7c7003a19 Merge remote-tracking branch 'origin/master' into xaig 2019-02-26 13:16:03 -08:00
Eddie Hung
7cac3b1c8b abc9 -- multiple connections for inouts 2019-02-26 12:18:28 -08:00