David Anderson
af8e85b7d2
techlibs/lattice: add missing clock muxes to ECP5 block ram blackboxes
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prjtrellis documentation shows that EBR clock inputs have optional inverters.
The bram techmap outputs those parameters, and nextpnr consumes them. But for
whatever reason, Diamond doesn't include those parameters in its blackbox
models. This makes synth_lattice fail when targeting ECP5 with a design that
maps block RAMs if you include any pass that needs cells_bb_ecp5.v's definitions.
This change fixes up the ECP5 bram blackbox models at generation time, by
adding the missing parameters back in.
Signed-off-by: David Anderson <dave@natulte.net>
2025-04-21 11:57:49 -07:00
Emil J
d901b28d2c
Merge pull request #4546 from NachtSpyder04/main
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[Docs]:Add new cell type help messages
2024-08-19 15:50:41 +02:00
David Lanzendörfer
d1b767ea8b
Adding missing to Gowin tech files
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Without OSER4_MEM, IDES4_MEM and DQS the synthesis of my Rocket Chip
design for my Sipeed Tang FPGA fails.
2024-08-18 19:38:31 +01:00
NachtSpyder04
aa60255e0e
update help messages that went beyond line length limit
2024-08-18 20:27:35 +05:30
Saish Karole
34aabd56cc
Apply suggestions from code review
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Co-authored-by: Martin Povišer <povik@cutebit.org>
2024-08-18 20:12:53 +05:30
Saish Karole
d80d4dc51c
[Docs]:Add new cell type help messages ( #1 )
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* add shift operators description
* update shift operations' descriptions, add desciptions for add, sub, logic_*, tribuf, mux, demux, concat, pow and comparison operators
2024-08-17 15:47:00 +05:30
N. Engelhardt
9f869b265c
Merge pull request #4474 from tony-min-1/mchp
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Add PolarFire FPGA support
2024-07-29 15:28:44 +02:00
Emil J
43c1328fbb
Merge pull request #4479 from yrabbit/z1-power
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Gowin. Add an energy saving primitive
2024-07-18 11:56:00 +02:00
YRabbit
19bbdd8800
Gowin. Add the DCS primitive
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Not so much adding the primitive itself, but only its DCS_MODE
parameter, without which an error occurs.
Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
2024-07-11 21:39:44 +10:00
chunlin min
3db69b7a10
inline all tests. Add switch to remove init values as PolarFire DFFs do not support init
2024-07-08 17:03:03 -04:00
chunlin min
0afb5e28fb
cosmetic changes
2024-07-08 15:10:44 -04:00
chunlin min
af67c745c4
initialize argidx to 1
2024-07-08 11:41:41 -04:00
chunlin min
a0c9d10118
undo last change, to investigate dff_opt test failure
2024-07-08 11:30:52 -04:00
chunlin min
3c95a28dc2
fix compile warning
2024-07-08 11:13:53 -04:00
Tony Min
d41688f7d7
Revisions ( #4 )
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* area should be 1 for all LUTs
* clean up macros
* add log_assert to fail noisily when encountering oddly configured DFF
* clean help msg
* flatten set to true by default
* update
* merge mult tests
* remove redundant test
* move all dsp tests to single file and remove redundant tests
* update ram tests
* add more dff tests
* fix c++20 compile errors
* add option to dump verilog
* default to use abc9
* remove -abc9 option since its the default now
---------
Co-authored-by: tony <minchunlin@gmail.com>
2024-07-08 10:57:16 -04:00
YRabbit
9d0bca9775
Gowin. Add an energy saving primitive
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We add a BANDGAP primitive used to turn off power to OSC, PLL and other
things on some GOWIN chips.
We also mark this primitive and GSR as keep.
Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
2024-07-06 18:58:21 +10:00
Tony Min
6fe0e00050
Add missing u sram init ( #3 )
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add missing INIT for uSRAM
2024-07-04 16:39:10 -04:00
chunlin min
8e7ec2d660
add assertions for synth_microchip tests
2024-07-04 15:45:44 -04:00
chunlin min
e3c4791e5b
move microchip tests from techlibs/microchip/tests to tests/arch/microchip
2024-07-04 14:16:52 -04:00
chunlin min
19d3214861
use output reg instead of additional reg declaration
2024-07-04 14:13:26 -04:00
C77874
5ba06fd947
another typo
2024-07-04 10:33:59 -07:00
C77874
6b80e02d62
missed a few pf instances
2024-07-04 10:25:15 -07:00
C77874
c385421c17
rename options
2024-07-04 09:45:04 -07:00
C77874
d0cd01adfe
fixed typos, build with makefile succeeds
2024-07-04 09:33:58 -07:00
C77874
59e45be275
Merge branch 'mchp' of https://github.com/tony-min-1/yosys into change_filenames
2024-07-04 09:00:38 -07:00
C77874
0bb7d1373f
changes made to filenames + references
2024-07-04 08:53:41 -07:00
Chun Lin Min
7770fa70e1
fix cells_sim.v
2024-07-04 05:20:22 -07:00
Chun Lin Min
f57b624281
fix indent
2024-07-02 13:54:36 -07:00
Chun Lin Min
68a11c9941
more indent fix
2024-07-02 13:51:48 -07:00
Chun Lin Min
2ced2752e9
replace space indent with tab indent
2024-07-02 13:47:18 -07:00
Chun Lin Min
acddc36389
add PolarFire FPGA support
2024-07-02 12:44:30 -07:00
Lofty
8cc9aa7fc6
intel_alm: drop quartus support
2024-05-03 11:32:33 +01:00
KrystalDelusion
c3ae33da33
Merge pull request #4285 from YosysHQ/typo_fixup
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Typo fixing
2024-04-25 09:54:48 +12:00
Martin Povišer
dc746080f5
Merge pull request #4298 from povik/kogge-stone
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techmap: Add a Kogge-Stone option for `$lcu` mapping
2024-04-08 16:46:06 +02:00
Martin Povišer
5f4d13ee3f
techmap: Note down iteration in Kogge-Stone
2024-04-08 16:45:40 +02:00
N. Engelhardt
8e8885e1cc
Merge pull request #4323 from YosysHQ/tests_update
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Tests update for latest more strict iverilog
2024-04-08 15:10:59 +02:00
Miodrag Milanovic
4ac10040ce
Enable SV for localparam use by Efinix cell_sim
2024-04-08 12:45:43 +02:00
Emil J. Tywoniak
9510293a94
fixup
2024-04-04 18:16:58 +02:00
Emil J. Tywoniak
a580a7c82c
docs: Document $macc
2024-04-03 20:37:54 +02:00
Martin Povišer
bc087f91ed
techmap: Fix using overwritten results in Kogge-Stone
2024-03-27 18:32:25 +01:00
Martin Povišer
4570d064e5
techmap: Split out Kogge-Stone into a separate file
2024-03-27 11:07:24 +01:00
Martin Povišer
c38201e15d
techmap: Add a Kogge-Stone option for $lcu mapping
2024-03-25 14:56:17 +01:00
Krystine Sherwin
ff10aeebd6
Fix some synth_* help messages
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Mostly memory_libmap arg checks; puts the checks into an else block on the `if (help_mode)` check to avoid cases like `synth_ice40` listing `-no-auto-huge [-no-auto-huge]`.
Also fix `map_iopad` section being empty in `synth_fabulous`.
2024-03-18 11:33:18 +13:00
Martin Povišer
570a8f12b5
synth: Fix out-of-sync help message
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Co-authored-by: N. Engelhardt <nakengelhardt@gmail.com>
2024-03-06 14:55:43 +01:00
Martin Povišer
d2a7ce04ea
synth: Rename -inject to -extra-map
2024-03-01 10:54:51 +01:00
Martin Povišer
ba07cba6ce
synth: Introduce -inject for amending techmap
2024-02-22 17:38:48 +01:00
Martin Povišer
d77b792156
synth: Put in missing bounds check for -lut
2024-02-22 17:24:26 +01:00
Miodrag Milanović
edb95c69a9
Merge pull request #4084 from jix/scopeinfo
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$scopeinfo support
2024-02-12 09:51:22 +01:00
Martin Povišer
7a3316dd78
synth: Tweak phrasing of -booth help
2024-02-08 00:05:15 +01:00
Martin Povišer
a98d363d9d
synth: Run script in full in help mode
2024-02-08 00:05:15 +01:00
