David Anderson
af8e85b7d2
techlibs/lattice: add missing clock muxes to ECP5 block ram blackboxes
...
prjtrellis documentation shows that EBR clock inputs have optional inverters.
The bram techmap outputs those parameters, and nextpnr consumes them. But for
whatever reason, Diamond doesn't include those parameters in its blackbox
models. This makes synth_lattice fail when targeting ECP5 with a design that
maps block RAMs if you include any pass that needs cells_bb_ecp5.v's definitions.
This change fixes up the ECP5 bram blackbox models at generation time, by
adding the missing parameters back in.
Signed-off-by: David Anderson <dave@natulte.net>
2025-04-21 11:57:49 -07:00
github-actions[bot]
72f77dd97b
Bump version
2024-08-23 00:18:22 +00:00
KrystalDelusion
09a42dd421
Merge pull request #4396 from YosysHQ/krys/docs_verific
...
Clarify Verific support where the `verific` front end is mentioned
Add page on building yosys+verific
2024-08-23 09:52:37 +12:00
Krystine Sherwin
583d820dc2
Docs: Apply verific docs suggestions
2024-08-23 09:23:57 +12:00
Emil J
7b0ecaa953
Merge pull request #4549 from YosysHQ/emil/macos-max-mem-usage
...
driver: print maximum memory usage on macOS
2024-08-22 17:43:32 +02:00
github-actions[bot]
27b51cb351
Bump version
2024-08-22 00:18:24 +00:00
Krystine Sherwin
3317d80480
Docs: Clarify verific caveats
2024-08-22 10:04:00 +12:00
Krystine Sherwin
6431534c24
Docs: Some other fixes
2024-08-22 10:03:59 +12:00
Krystine Sherwin
8145461c78
Docs: Fix Verific builds table formatting
...
PDF don't like the long headers, so instead use placeholders a-d with elaborations below.
2024-08-22 10:03:59 +12:00
Krystine Sherwin
0327ad97f2
Docs: Fix code formatting
...
Gets me everytime
2024-08-22 10:03:59 +12:00
Krystine Sherwin
36ad07e1d5
Docs: Update build_verific
...
Clarify partially supported builds section.
Update parameter defaults.
Include note on finding compile options with `yosys-config`.
Fix remaining references to `/yosys_source/`.
2024-08-22 10:03:59 +12:00
Krystine Sherwin
88bb785dcd
Docs: Verific but with sentences
2024-08-22 10:03:59 +12:00
Krystine Sherwin
cfba26ca8b
Docs: Verific progress
2024-08-22 10:03:59 +12:00
Krystine Sherwin
00bb3b6fc2
Docs: Merge yosys_source into extending_yosys
...
Move abc_flow content into synthesis/abc document.
2024-08-22 10:03:59 +12:00
Krystine Sherwin
8e618cac45
Docs: Update build_verific.rst
...
Move patch section to top.
Add todos for open questions.
Reformat partially supported builds into a single table.
General language tidy up/reflow.
2024-08-22 10:03:59 +12:00
Krystine Sherwin
53b223f0df
Docs: Initial build_verific.rst
...
From verific.md
Co-authored-by: Miodrag Milanovic <mmicko@gmail.com>
2024-08-22 10:03:59 +12:00
Krystine Sherwin
d97a243c22
Docs: Intro to Yosys source section
2024-08-22 10:03:59 +12:00
Krystine Sherwin
e18a2f1e27
Docs: Section/folder for yosys source details
...
Move test_suites page into said folder.
Placeholder page for building with verific.
2024-08-22 10:03:58 +12:00
Krystine Sherwin
2ffafadf22
Docs: Add note on verific
...
Having a verific license does not provide access to the verific frontend.
2024-08-22 10:03:58 +12:00
Roland Coeurjoly
27c1432253
Remove log
2024-08-21 14:28:42 +01:00
Roland Coeurjoly
91e3773b51
Ensure signed constants are correctly parsed, represented, and exported in RTLIL. Add a test to check parsing and exporting
2024-08-21 14:28:42 +01:00
github-actions[bot]
4cddc19994
Bump version
2024-08-20 00:18:24 +00:00
Miodrag Milanović
e4c8bb0ac5
Merge pull request #4552 from YosysHQ/krys/rtd_on_main
...
docs: Only trigger RTDs on main
2024-08-19 20:11:55 +02:00
Krystine Sherwin
7d779c64a3
docs: Only trigger RTDs on main
2024-08-20 04:26:58 +12:00
Emil J
d901b28d2c
Merge pull request #4546 from NachtSpyder04/main
...
[Docs]:Add new cell type help messages
2024-08-19 15:50:41 +02:00
Emil J
9de534892e
Merge pull request #4515 from RCoeurjoly/nix_on_macos
...
Run nix build also on macos. Build with more logs
2024-08-19 15:49:23 +02:00
Emil J
e0d3bbf3c3
Merge pull request #4452 from phsauter/shiftadd-underflow-fix
...
peepopt: avoid shift-amount underflow
2024-08-19 15:45:46 +02:00
Emil J
0dfa4962d1
Merge pull request #4547 from leviathanch/fix_apicula1
...
Add DQS and related primitives to Gowin tech files
2024-08-19 15:44:48 +02:00
Emil J. Tywoniak
4847caac49
driver: print maximum memory usage on macOS as well
2024-08-19 12:50:12 +02:00
Krystine Sherwin
6df0c3d9ec
docs: Fix synth_flow generation
2024-08-19 21:25:51 +12:00
Krystine Sherwin
8773cf7721
test-verific: Use fast runner
2024-08-19 21:24:48 +12:00
N. Engelhardt
7f08a298a4
Merge pull request #4542 from YosysHQ/krys/rtd
...
Local readthedocs
2024-08-19 10:04:38 +02:00
David Lanzendörfer
d1b767ea8b
Adding missing to Gowin tech files
...
Without OSER4_MEM, IDES4_MEM and DQS the synthesis of my Rocket Chip
design for my Sipeed Tang FPGA fails.
2024-08-18 19:38:31 +01:00
NachtSpyder04
aa60255e0e
update help messages that went beyond line length limit
2024-08-18 20:27:35 +05:30
Saish Karole
34aabd56cc
Apply suggestions from code review
...
Co-authored-by: Martin Povišer <povik@cutebit.org>
2024-08-18 20:12:53 +05:30
Saish Karole
d80d4dc51c
[Docs]:Add new cell type help messages ( #1 )
...
* add shift operators description
* update shift operations' descriptions, add desciptions for add, sub, logic_*, tribuf, mux, demux, concat, pow and comparison operators
2024-08-17 15:47:00 +05:30
github-actions[bot]
5fb3c0b1d9
Bump version
2024-08-17 00:17:44 +00:00
KrystalDelusion
3dd32d741a
Stop unconditionally building abc
...
_What are the reasons/motivation for this change?_
abc builds unconditional because `check-git-abc` is a phony prerequisite and therefore always runs, and since it always runs it will always trigger abc to rebuild.
_Explain how this is achieved._
Convert `check-git-abc` to an order-only prerequisite. It still runs as before, but no longer triggers yosys-abc to rebuild when it does.
_If applicable, please suggest to reviewers how they can test the change._
2024-08-17 11:04:17 +12:00
Krystine Sherwin
7bd3c7b968
Fix test-verific.yml
2024-08-16 10:43:51 +12:00
Krystine Sherwin
3b63ab07ae
docs: Build RTD artifacts directly
...
Use rtds-action instead of yosys-cmd-ref repo.
Add rtds_action to docs configuration.
Add `.readthedocs.yaml`.
Update `DOCS_USAGE_` make target to be able to use pre-generated executables without forcing a remake.
2024-08-16 10:43:51 +12:00
Miodrag Milanović
ceba889641
Merge pull request #4540 from YosysHQ/clang-11
...
Replace test-compile (ubuntu-22.04, clang-11)
2024-08-15 17:39:42 +02:00
github-actions[bot]
1eaf4e0790
Bump version
2024-08-15 00:17:57 +00:00
Krystine Sherwin
d709177770
test-compile: Downgrade to focal
2024-08-15 09:44:20 +12:00
Martin Povišer
a854903ff0
Merge pull request #4537 from povik/libparse-cleanup
...
Liberty parsing cleanup
2024-08-14 18:24:51 +02:00
Martin Povišer
ab5d6b06b4
read_liberty: Fix omitted helper change
2024-08-13 20:12:38 +02:00
Martin Povišer
309d80885b
read_liberty: Use available gate creation helpers
2024-08-13 18:47:36 +02:00
Martin Povišer
3057c13a66
Improve libparse encapsulation
2024-08-13 18:47:36 +02:00
Martin Povišer
c35f5e379c
Extend liberty tests
2024-08-13 18:47:36 +02:00
Martin Povišer
78382eaa6f
libparse: Adjust whitespace
2024-08-13 18:47:36 +02:00
github-actions[bot]
4b9f452735
Bump version
2024-08-13 00:19:11 +00:00