Akash Levy
771e5c9996
Fix mem
2024-11-12 00:59:05 -08:00
Akash Levy
894c9816d3
Improve naming: big fix
2024-11-11 17:06:11 -08:00
Akash Levy
ea76abdaee
Merge
2024-11-11 11:47:58 -08:00
Robin Ole Heinemann
8bc4bd8a20
cxxrtl, fmt: escape double quotes in c strings
2024-11-11 18:49:05 +00:00
Alain Dargelas
43186b2c7a
Returning unsigned int
2024-11-06 16:39:58 -08:00
Alain Dargelas
3ad51e06bc
Using Yosys hash
2024-11-06 16:32:18 -08:00
Alain Dargelas
39c2d7aa60
RTLIL Module dump and hash
2024-11-06 15:48:24 -08:00
Akash Levy
37914ff129
Merge branch 'YosysHQ:main' into main
2024-11-06 14:14:08 -08:00
N. Engelhardt
2de9f00368
Merge pull request #4620 from RCoeurjoly/fix-vcd-parsing-ghdl-var-spacing
2024-11-06 16:29:07 +01:00
N. Engelhardt
9068ec5566
Merge pull request #4627 from RCoeurjoly/roland/assume_x
2024-11-06 16:27:30 +01:00
Akash Levy
1cba744712
Update
2024-11-04 17:01:41 -08:00
Emil J
b2d78589e2
Merge pull request #4675 from YosysHQ/emil/pyosys-fix-segfault
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yosys: fix pyosys initialization segfault
2024-11-01 16:40:58 +01:00
Akash Levy
d63c793e72
Merge branch 'YosysHQ:main' into main
2024-10-28 11:24:55 -07:00
Lofty
dd7ea0ab6c
qwp: remove
2024-10-25 14:09:58 +01:00
Akash Levy
7864c6dd34
vector fix for pyosys
2024-10-24 23:12:54 -07:00
Akash Levy
9ba609a7b0
Merge branch 'YosysHQ:main' into main
2024-10-21 16:28:19 -07:00
Emil J
7db4c65970
Merge pull request #4672 from YosysHQ/emil/fix-tcl-args-cxxopts
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driver: fix special args passing to tcl and python
2024-10-21 15:41:24 +02:00
Akash Levy
0ddf964554
Merge branch 'YosysHQ:main' into main
2024-10-18 05:33:40 -07:00
Emil J. Tywoniak
37e61b993a
yosys: fix pyosys initialization segfault
2024-10-18 11:56:13 +02:00
Emil J
799497ebba
Merge pull request #4671 from YosysHQ/emil/const-deref-pyosys
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py_wrap: implement nested class definitions
2024-10-18 11:46:12 +02:00
Emil J. Tywoniak
49d8a35c2e
rtlil: appease py_wrap
2024-10-18 11:31:20 +02:00
Akash Levy
6d4d6a6eff
Merge branch 'YosysHQ:main' into main
2024-10-17 10:26:17 -07:00
Emil J. Tywoniak
0341265e64
driver: fix special args passing to tcl and python
2024-10-16 23:56:45 +02:00
Emil J. Tywoniak
e9e67f381c
rtlil: remove trailing comma as pyosys workaround
2024-10-16 23:15:06 +02:00
Akash Levy
711e1f3164
Merge branch 'YosysHQ:main' into main
2024-10-16 13:21:03 -07:00
Krystine Sherwin
4ea6119734
cmdref: Move html only section inside cmd:def
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Fixes missing links in body and `??` in tag/command index.
Update synth.rst to match.
2024-10-17 06:06:57 +13:00
alaindargelas
5019bd826d
Revert "auto name change until openSTA signal name parsing is fixed"
2024-10-15 18:36:37 -07:00
Akash Levy
1be0a50185
Fix comma that pyosys hates
2024-10-15 03:20:54 -07:00
Alain Dargelas
ecb9d3703b
auto name change until openSTA signal name parsing is fixed
2024-10-14 21:14:45 -07:00
Krystine Sherwin
b1025dbaa6
cellhelp.py: Cells can have tags
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Tags are added to the list of properties when exporting to `cells.json`.
2024-10-15 07:35:41 +13:00
Krystine Sherwin
04b0ae540d
cellref: Move default help message to register.cc
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Drop the default help message from rst while still displaying it on the command line.
Fix command line formatting for older style help messages.
2024-10-15 07:31:47 +13:00
Krystine Sherwin
b127ac07f8
Docs: Preliminary autocellgroup usage
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Remove `/source/cell` from .gitignore.
Add a few initial cell pages.
Add YosysCellGroup documenter and cell:group directive.
Update Documenters to use nested json.
Better nested tocs for group.module.source layout.
2024-10-15 07:26:04 +13:00
Krystine Sherwin
7c5b10fe50
cellref: Add json dump
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New `help -dump-cells-json <file>` to dump cells list.
Add 'group' field to SimHelper class/struct with defaults to gate_other and word_other depending on source (simcells or simlib).
Add 'unary' group to unary operator cells for testing (based on internal cell library docs page).
2024-10-15 07:25:27 +13:00
Krystine Sherwin
063a6bc2d7
register.cc: Include properties in docs
2024-10-15 07:23:45 +13:00
Krystine Sherwin
4c9c4c1419
celltypes.h: Add extra properties
2024-10-15 07:23:45 +13:00
Krystine Sherwin
21747c468c
Docs: Improve cell_help usage
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- Drop `cell_code` and instead map code lookups to the `cell_help` dict.
- Add helper functions to struct for checking and getting the right cell.
- Add `CellType` for cell to `write_cell_rst` function declaration in
preparation for use in future.
- Iterate over `yosys_celltypes.cell_types` when exporting cell rst files,
reporting errors for any cells defined in `cell_types` but not
`cell_help_messages`.
2024-10-15 07:23:45 +13:00
Akash Levy
469f5a707a
Merge branch 'YosysHQ:main' into main
2024-10-14 11:21:54 -07:00
Krystine Sherwin
f9b4e04fef
Docs: Add cell reference
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Subclass the command reference code in order to support smart references to the internal cells.
2024-10-15 07:17:36 +13:00
Krystine Sherwin
c98d134662
cellhelp: Extra newline
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Fix `$macc` page.
2024-10-15 07:17:35 +13:00
Krystine Sherwin
d629aa6bf1
cellhelp: Split gate-level and word-level cells
2024-10-15 07:17:35 +13:00
Krystine Sherwin
57cd8d29db
cellhelp: Add default format parse for simcells
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Since `simcells.v` uses consistent formatting we can handle it specifically to help tidy up sphinx warnings about the truth tables, and instead chuck them in a code block which when printing to rst.
Also has the side effect that rst code blocks can be added manually with `//- ::` followed by a blank line.
2024-10-15 07:16:40 +13:00
Krystine Sherwin
a2b2904ed8
cellhelp: Add source line to help
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Include Source file and line number in SimHelper struct, and use it for verilog code caption in rst dump.
Also reformat python string conversion to iterate over a list of fields instead of repeating code for each.
2024-10-15 07:16:40 +13:00
Krystine Sherwin
784292626e
cellhelp: Rename short_desc to title
2024-10-15 07:16:39 +13:00
Krystine Sherwin
1e5a50ff3a
Docs: Convert write_cell_rst to use SimHelper
2024-10-15 07:16:39 +13:00
Krystine Sherwin
6bbe763845
Docs: Put cell library help strings into a struct
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Allows for more expressive code when constructing help messages for cells.
Will also move extra logic in parsing help strings into the initial python parse instead of doing it in the C++ at export time.
2024-10-15 07:16:39 +13:00
Krystine Sherwin
a6641da73c
Docs: Initial version of cell_ref autogen
2024-10-15 07:16:39 +13:00
Emil J. Tywoniak
bc5d9d1bd3
functional: fix std::move usage in Factory::constant
2024-10-14 06:28:14 +02:00
Emil J. Tywoniak
785bd44da7
rtlil: represent Const strings as std::string
2024-10-14 06:28:12 +02:00
Akash Levy
8e6ac65dd8
Merge branch 'YosysHQ:main' into main
2024-10-13 10:59:19 -07:00
Emil J
61ed9b6263
Merge pull request #4608 from phsauter/rtlil-const-compress
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rtlil: add Const::compress helper function
2024-10-12 20:38:25 -07:00
