mirror of
https://github.com/YosysHQ/yosys
synced 2025-04-24 01:25:33 +00:00
Returning unsigned int
This commit is contained in:
parent
3ad51e06bc
commit
43186b2c7a
2 changed files with 3 additions and 3 deletions
|
@ -2520,8 +2520,8 @@ std::string RTLIL::Module::rtlil_dump() {
|
|||
}
|
||||
|
||||
// Returns a hash of the RTLIL dump
|
||||
std::string RTLIL::Module::rtlil_hash() {
|
||||
return std::to_string(hash_ops<std::string>::hash(rtlil_dump()));
|
||||
unsigned int RTLIL::Module::rtlil_hash() {
|
||||
return hash_ops<std::string>::hash(rtlil_dump());
|
||||
}
|
||||
|
||||
void RTLIL::Module::swap_names(RTLIL::Cell *c1, RTLIL::Cell *c2)
|
||||
|
|
|
@ -1592,7 +1592,7 @@ public:
|
|||
RTLIL::SigSpec FutureFF (RTLIL::IdString name, const RTLIL::SigSpec &sig_e, const std::string &src = "");
|
||||
|
||||
std::string rtlil_dump();
|
||||
std::string rtlil_hash();
|
||||
unsigned int rtlil_hash();
|
||||
|
||||
#ifdef WITH_PYTHON
|
||||
static std::map<unsigned int, RTLIL::Module*> *get_all_modules(void);
|
||||
|
|
Loading…
Add table
Add a link
Reference in a new issue