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cellhelp: Add default format parse for simcells
Since `simcells.v` uses consistent formatting we can handle it specifically to help tidy up sphinx warnings about the truth tables, and instead chuck them in a code block which when printing to rst. Also has the side effect that rst code blocks can be added manually with `//- ::` followed by a blank line.
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2 changed files with 31 additions and 4 deletions
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@ -988,10 +988,14 @@ struct HelpPass : public Pass {
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}
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else if (cell_help_messages.cell_help.count(args[1])) {
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SimHelper help_cell = cell_help_messages.cell_help.at(args[1]);
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if (help_cell.ver == "2") {
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log("\n %s %s\n", help_cell.name.c_str(), help_cell.ports.c_str());
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log("\n%s\n", help_cell.title.c_str());
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log("%s\n", help_cell.desc.c_str());
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if (help_cell.ver == "2" || help_cell.ver == "2a") {
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log("\n %s %s\n\n", help_cell.name.c_str(), help_cell.ports.c_str());
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if (help_cell.title != "") log("%s\n", help_cell.title.c_str());
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std::stringstream ss;
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ss << help_cell.desc;
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for (std::string line; std::getline(ss, line, '\n');) {
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if (line != "::") log("%s\n", line.c_str());
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}
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log("Run 'help %s+' to display the Verilog model for this cell type.\n", args[1].c_str());
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log("\n");
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} else {
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