Eddie Hung
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e6642d2928
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sta: assume input-less modules to be constant drivers and don't warn ...
if no timing arcs. Also handle undefined modules with a warning
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2020-05-05 07:51:22 -07:00 |
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Eddie Hung
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9cf172b7a9
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sta: better handling when no timing paths and unused bits
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2020-05-05 07:51:22 -07:00 |
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Eddie Hung
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10eaeabe1e
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sta: use ID::sta_arrival
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2020-05-05 07:51:22 -07:00 |
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Eddie Hung
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cf6b60f79c
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sta: more graceful when maxbit is not an endpoint, will still print path
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2020-05-05 07:51:22 -07:00 |
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Eddie Hung
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72d73fe4d0
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sta: missing sigmap
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2020-05-05 07:51:22 -07:00 |
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Eddie Hung
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d58a648f45
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sta: do not consider constant bits
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2020-05-05 07:51:22 -07:00 |
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Eddie Hung
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c5e13f412a
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sta: do not add constant driven POs as endpoints
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2020-05-05 07:51:22 -07:00 |
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Eddie Hung
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2561121b22
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sta: ignore timing arc if no input port
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2020-05-05 07:51:22 -07:00 |
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Eddie Hung
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70e198f9f9
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sta: tune output
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2020-05-05 07:51:22 -07:00 |
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Eddie Hung
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d523168a1c
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sta: track and print source port too
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2020-05-05 07:51:22 -07:00 |
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Eddie Hung
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ddbe81df78
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timinginfo: arrival/required times with clocks
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2020-05-05 07:51:22 -07:00 |
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Eddie Hung
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9c640bfdd2
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sta: reverse LHS of histogram
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2020-05-05 07:51:22 -07:00 |
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Eddie Hung
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f157f6cba3
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sta: print out arrival histogram
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2020-05-05 07:51:22 -07:00 |
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Eddie Hung
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dedaab3a7d
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sta: proof of concept to compute arrival times
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2020-05-05 07:51:22 -07:00 |
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