mirror of
https://github.com/YosysHQ/yosys
synced 2025-04-20 07:36:39 +00:00
sta: ignore timing arc if no input port
This commit is contained in:
parent
a921985e3c
commit
2561121b22
|
@ -111,7 +111,8 @@ struct StaWorker
|
|||
if (it == t.arrival.end())
|
||||
continue;
|
||||
const auto &s = it->second.second;
|
||||
data[cell->getPort(s.name)[s.offset]].fanouts.emplace_back(bit,it->second.first,s.name);
|
||||
if (cell->hasPort(s.name))
|
||||
data[cell->getPort(s.name)[s.offset]].fanouts.emplace_back(bit,it->second.first,s.name);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
|
Loading…
Reference in a new issue