3
0
Fork 0
mirror of https://github.com/YosysHQ/yosys synced 2025-04-20 07:36:39 +00:00
Commit graph

14981 commits

Author SHA1 Message Date
Emil J. Tywoniak 218ec3fc05 dfflibmap: allow gzipped liberty files 2025-03-19 13:43:44 +01:00
Emil J. Tywoniak 813f909460 gzip: istream 2025-03-19 13:43:44 +01:00
Emil J. Tywoniak 4f3fdc8457 io: refactor string and file work into new unit 2025-03-19 13:43:42 +01:00
Emil J. Tywoniak 613a17b4a8 ezsat: fix incorrect logging references to function names 2025-03-19 10:33:28 +01:00
Emil J. Tywoniak 061cf5c6c4 share: re-add SAT solver cell count to log message 2025-03-19 10:27:23 +01:00
Akash Levy 9c5bffcf93 Use wheel 2025-03-17 17:56:02 -07:00
github-actions[bot] 0c689091e2 Bump version 2025-03-18 00:21:58 +00:00
Akash Levy 0abe8bfee8
Merge branch 'YosysHQ:main' into pyosys_copy_abc 2025-03-17 16:50:14 -07:00
KrystalDelusion fac13f12c6
Merge pull request #4941 from DanielG/sphinx-reproducible
docs: Add latex magic to make PDFs reproducible again
2025-03-18 10:22:14 +13:00
Krystine Sherwin 39a1623ac0
Docs: Don't READTHEDOCS on local builds 2025-03-18 03:57:17 +13:00
Anhijkt a9d765e11e ice40_dsp: group empty wires 2025-03-16 15:11:45 +02:00
Daniel Gröber de11624f42 mk: Avoid broken rebuild if program --help fails
Make will happily consider a target available if it's zero sized.

When writing output files with shell redirections for commands that usually
succeed we can apply the `|| rm $@` pattern.

For commands where --help exits with failure we always rerun the recipe
instead.
2025-03-16 10:53:55 +01:00
Anhijkt 5ae32efca5 ice40_dsp: add test 2025-03-15 20:05:57 +02:00
Emil J 05cd1e2942
Merge pull request #4904 from YosysHQ/emil/share-limit-effort
share: add -pattern-limit to limit analysis effort
2025-03-15 18:00:42 +01:00
Anhijkt 725c489c7e ice40_dsp: fix log_assert issue 2025-03-15 17:11:32 +02:00
Krystine Sherwin 8877817fa9
Fix Docs issues for offline pdf builds #4777
Drop svg badges.  Even though they were only appearing in the html version, the latexpdf target was still trying to download them, leading to warnings-as-errors in offline builds.
2025-03-15 12:14:09 +13:00
Scott Ashcroft d8af6b0616 docs: Add latex magic to make PDFs reproducible again 2025-03-14 21:48:08 +01:00
KrystalDelusion 6884c98e08
Merge pull request #4926 from JasonBrave/filelist
Verilog file list suport
2025-03-14 16:53:27 +13:00
KrystalDelusion 9f1271bee0
Merge pull request #4922 from Anhijkt/fix-splitcells-assert
splitcells: Fix the assertion bug caused by out-of-bound offset
2025-03-14 16:52:38 +13:00
KrystalDelusion 9fa1f0e70c
Merge pull request #4567 from kivikakk/cxxrtl-escape-trailing
cxxrtl: use octal encoding of non-printables.
2025-03-14 16:52:07 +13:00
Krystine Sherwin 8405b3b723
select: Fix -none and -clear
If the selection stack only has one element (which it normally does), then
`design->pop_selection()` automatically resets to the default full selection.
This is a problem for `select [-none | -clear]` which were trying to replace the
current selection, but because the pop added an extra element when the `execute`
returned, the extra selection (the one we actually wanted) gets popped too. So
instead, reassign `design->selection()` in the same way as if we called `select
[selection]`.

Also adds selection stack tests, and removes the accidentally-committed
`boxes_dummy.ys`.
2025-03-14 16:32:18 +13:00
Krystine Sherwin 68adac691d
rtlil.cc: Add comment to log_assert
Because the use of `RTLIL::AttrObject::get_blackbox_attribute()` is deprecated, but the assert is needed in case users are doing weird things.
2025-03-14 14:40:06 +13:00
Krystine Sherwin a3968d43f0
Drop deprecation on Design::selected_modules()
Instead, change the default `Design::selected_modules()` to match the behaviour (i.e. `selected_unboxed_modules_warn()`) because it's a lot of files to touch and they don't really _need_ to be updated.
Also change `Design::selected_whole_modules()` users over to `Design::selected_unboxed_whole_modules()`, except `attrmap` because I'm not convinced it should be ignoring boxes.  So instead, leave the deprecation warning for that one use and come back to the pass another time.
2025-03-14 14:08:56 +13:00
Krystine Sherwin 46a311acb2
firrtl: Drop full_selection check
Change `top` pointer default to `nullptr` to avoid issues with `Design->top_module()` only operating on the current selection.

Calls to other passes (`bmuxmap` etc) will only operate on the current selection, and may cause problems when those cells are unprocessed, but this is consistent with the other backends that only operate on the full designs and will hopefully be fixed in another PR soon :)
2025-03-14 14:08:56 +13:00
Krystine Sherwin 732c82f851
abc_new: Use push_empty_selection() 2025-03-14 14:08:56 +13:00
Krystine Sherwin add5eba9b2
Design::selection_stack should never be empty
Add a `log_assert` for it in `Design::check()`.
Remove unneeded checks in other places.
2025-03-14 14:08:16 +13:00
Krystine Sherwin 7eaf33e4da
abc9: Use techmap -autoproc
Fixes quicklogic/pp3 problem with `dffepc` including processes.
Also means the preceding `proc` is safe to remove (and may result in some small speedup by doing so).
2025-03-14 14:08:16 +13:00
Krystine Sherwin 38293d3bdf
select.cc: Fix %i when rhs is empty 2025-03-14 14:08:16 +13:00
Krystine Sherwin 2dec493054
abc9.cc: Call select =*
Or rather, say we're calling `select =*`, but actually bypass the select command to avoid the warning that can pop up if there is nothing to select.
2025-03-14 14:08:15 +13:00
Krystine Sherwin cacea737bc
select.cc: Re-add '=' to empty selection warning 2025-03-14 14:08:15 +13:00
Krystine Sherwin 824f7146aa
Selecting a blackbox sets selects_boxes 2025-03-14 14:08:15 +13:00
Krystine Sherwin a30bacfcb1
Add Selection::complete_selection
Used to select all modules including boxes, set when both `full` and `boxes` are true in the constructor, pulling down `full_selection`.
Add `Selection::selects_all()` method as short hand for `full_selection || complete_selection`.
Update selection operations to account for complete selections.
Add static methods to `Selection` for creating a new empty/full/complete selection to make it clearer to users when doing so.
Use said static methods to replace most instances of the `Selection` constructor.
Update `Selection::optimize` to use
2025-03-14 14:08:15 +13:00
Krystine Sherwin 9a9cd05f6c
tests: Fixes for boxes
cxxrtl `test_unconnected_output` and simple_abc9 `abc9.v` both expect boxed modules in the outputs, so make sure they work as expected.
2025-03-14 14:08:15 +13:00
Krystine Sherwin b296a970d2
abc9: Use push_empty_selection() 2025-03-14 14:08:14 +13:00
Krystine Sherwin f15cd73419
Fix select_op_random ignoring boxes 2025-03-14 14:08:14 +13:00
Krystine Sherwin 59802584b0
Fix describe_selection_for_assert
If the current selection is not the provided selection, push the provided selection.
2025-03-14 14:08:14 +13:00
Krystine Sherwin d09ae42951
Fixing selections 2025-03-14 14:08:14 +13:00
Krystine Sherwin 091e9488fe
rtlil: Design::top_module() can be const
Since it doesn't change anything and is just a lookup.
2025-03-14 14:08:14 +13:00
Krystine Sherwin dac2bb7d4d
Use selection helpers
Catch more uses of selection constructor without assigning a design.
2025-03-14 14:08:13 +13:00
Krystine Sherwin a67b57bd64
rtlil: Add selection helpers
New methods on Design to push/pop selection instead of accessing the selection stack directly. Includes methods for pushing a full/complete/empty selection.
Also helper methods on modules to check `is_selected` and `is_selected_whole`.
2025-03-14 14:05:40 +13:00
Krystine Sherwin 3b1b09baf6
Can clean boxed modules
If a selection contains a boxed module, but does not select boxes, it should be removed from the selection.
2025-03-14 14:05:40 +13:00
Krystine Sherwin 2f907e8be4
Unify Design::selected_modules variants
Now uses two enums, one to control whether or not to include partially selected
modules (and what to do if they are encountered), and one to control whether or
not to include boxed modules (and what to do if they are encountered).

Mark Design::selected{modules, whole_modules}() deprecated and make them
provide warnings on boxes. There are a lot of places that use them and I can't
always tell which ones support boxed modules and which don't.
2025-03-14 14:05:40 +13:00
Krystine Sherwin 061c234559
tests/select: Add tests for selections with boxes 2025-03-14 14:05:40 +13:00
Krystine Sherwin 398afd102e
Refactor full_selection
The `Design::selected_*()` methods no longer unconditionally skip boxed modules.  Instead, selections are now box and design aware.
The selection constructor now optionally takes a design pointer, and has a new `selects_boxes` flag.  If the selection has an assigned design, then `Selection::selected_*()` will only return true for boxed modules if the selects_boxes flag is set.  A warning is raised if a selection is checked and no design is set.  Selections can change design via the `Selection::optimize()` method.
Most places that iterate over `Design::modules()` and check `Selection::selected_module()` should instead use `Design::selected_modules()`.
Since boxed modules should only ever be selected explicitly, and `full_selection` (now) refers to all non-boxed modules, `Selection::optimize()` will clear the `full_selection` flag if the `selects_boxes` flag is enabled, and instead explicitly selects all modules (including boxed modules).  This also means that `full_selection` will only get automatically applied to a design without any boxed modules.

These changes necessitated a number of changes to `select.cc` in order to support this functionality when operating on selections, in particular when combining selections (e.g. by union or difference).
To minimize redundancy, a number of places that previously iterated over `design->modules()` now push the current selection to the design, use `design->selected_modules()`, and then pop the selection when done.

Introduce `RTLIL::NamedObject`, to allow for iterating over all members of a module with a single iterator instead of needing to iterate over wires, cells, memories, and processes separately.
Also implement `Module::selected_{memories, processes, members}()` to match wires and cells methods.  The `selected_members()` method combines each of the other `selected_*()` methods into a single list.
2025-03-14 14:05:39 +13:00
github-actions[bot] e44d1d404a Bump version 2025-03-13 00:22:18 +00:00
Martin Povišer 6da543a61a
Merge pull request #4818 from povik/macc_v2
Add `$macc_v2`
2025-03-12 22:55:40 +01:00
KrystalDelusion 65748b8387
Merge pull request #4898 from Anhijkt/fix-xaiger-segfault
write_xaiger: Detect and error on combinatorial loops
2025-03-13 10:49:48 +13:00
KrystalDelusion bf96ed322d
Merge pull request #4827 from aerkiaga/main
Update ALU MULT mode in gowin to match nextpnr
2025-03-13 10:49:37 +13:00
Miodrag Milanovic 1b07d204bb Next dev cycle 2025-03-12 09:11:41 +01:00
Miodrag Milanovic c4b5190229 Release version 0.51 2025-03-12 08:31:37 +01:00