Pulse Contributors Code frequency Recent commits

2025-01-03T01:05:06Z - 2025-04-03T01:05:06Z

Period: 3 months

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Overview

14 active pull requests

0 active issues

14
Merged pull requests 0
Proposed pull requests 0
Closed issues 0
New issues

Excluding merges, 1 author has pushed 27 commits to master and 27 commits to all branches. On master, 69 files have changed and there have been 17357 additions and 9077 deletions.

14 pull requests merged by 1 user

Merged #27 improve SimValue<T> to generally be more like Expr<T> 2025-04-02 05:28:30 +00:00

Merged #26 implement simulation of extern modules 2025-03-26 02:02:54 +00:00

Merged #25 add ExprPartialEq/ExprPartialOrd impls for PhantomConst 2025-03-11 02:48:58 +00:00

Merged #24 fix using fayalite as a dependency 2025-03-10 06:45:41 +00:00

Merged #23 add PhantomConst 2025-03-10 05:51:21 +00:00

Merged #22 add efficient prefix-sums and reductions 2025-03-03 07:12:31 +00:00

Merged #20 add Expr<ArrayType<T, Len>>: IntoIterator and Expr<Array<T>>: FromIterator<T> 2025-03-03 02:10:57 +00:00

Merged #21 switch CI to use mirrors 2025-03-03 02:01:40 +00:00

Merged #19 add #[hdl(cmp_eq)] to implement HdlPartialEq automatically 2025-02-17 04:56:49 +00:00

Merged #18 support unknown trait bounds in type parameters 2025-02-14 02:52:18 +00:00

Merged #17 add #[hdl] let destructuring 2025-02-11 07:07:26 +00:00

Merged #16 sim: fix "label address not set" bug when the last Assignment is conditional 2025-01-16 03:12:04 +00:00

Merged #15 tests/sim: add test_array_rw 2025-01-13 06:02:20 +00:00

Merged #14 properly handle duplicate names in vcd 2025-01-10 07:11:44 +00:00