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implement simulation of extern modules #26

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programmerjake merged 5 commits from programmerjake/fayalite:sim-extern-module into master 2025-03-26 02:02:54 +00:00
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programmerjake commented 2025-03-21 08:50:37 +00:00
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This should be working, but only has 1 very basic test.

Done:

  • add more tests -- added test_ripple_counter and test_extern_module2
  • add waiting for the next clock edge in extern modules

I wanted to implement this now so I can try to write cpu parts as actual imperative rust code, and then once it works, then I can translate to actual HDL, hopefully making it easier to wrap my head around it.

This should be working, but only has 1 very basic test. Done: * add more tests -- added `test_ripple_counter` and `test_extern_module2` * add waiting for the next clock edge in extern modules I wanted to implement this now so I can try to write cpu parts as actual imperative rust code, and then once it works, then I can translate to actual HDL, hopefully making it easier to wrap my head around it.
programmerjake added 2 commits 2025-03-21 08:50:38 +00:00
implement simulation of extern modules
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d1bd176b28
programmerjake changed title from implement simulation of extern modules to WIP: implement simulation of extern modules 2025-03-21 09:06:57 +00:00
programmerjake added 1 commit 2025-03-22 00:09:18 +00:00
simplify setting an extern module simulation
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ab9ff4f2db
programmerjake added 1 commit 2025-03-26 01:28:34 +00:00
simulator: allow external module generators to wait for value changes and/or clock edges
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a115585d5a
programmerjake added 1 commit 2025-03-26 01:54:34 +00:00
add ripple counter test to test simulating alternating circuits and extern modules
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1b220b73e7
programmerjake force-pushed sim-extern-module from 1b220b73e7 to fdc73b5f3b 2025-03-26 01:56:45 +00:00 Compare
programmerjake changed title from WIP: implement simulation of extern modules to implement simulation of extern modules 2025-03-26 02:02:23 +00:00
programmerjake merged commit fdc73b5f3b into master 2025-03-26 02:02:54 +00:00
programmerjake deleted branch sim-extern-module 2025-03-26 02:02:54 +00:00
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Reference: libre-chip/fayalite#26
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