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Author	SHA1	Message	Date
Eddie Hung	f90a4b1e24	Missed this	2019-10-05 08:57:37 -07:00
Eddie Hung	991c2ca95b	Add comment on why we have to match for clock-enable/reset muxes	2019-10-05 08:56:37 -07:00
Eddie Hung	ebb059896a	Add note on pattern detector	2019-10-05 08:53:01 -07:00
Eddie Hung	6c5e1234e1	Add comment on why partial multipliers are 18x18	2019-10-04 22:31:04 -07:00
Eddie Hung	792cd31052	Add comments for xilinx_dsp_cascade	2019-10-04 22:31:04 -07:00
Eddie Hung	12fd2ec4f0	Improve comments for xilinx_dsp_CREG	2019-10-04 22:31:04 -07:00
Eddie Hung	14e4aeece6	Fix comment	2019-10-04 22:31:04 -07:00
Eddie Hung	8027ebf05b	Restore optimisation for sigM.empty()	2019-10-04 22:31:04 -07:00
Eddie Hung	77d7a5c14a	Retry on fixing TODOs	2019-10-04 22:31:04 -07:00
Eddie Hung	52583ecff8	Revert "Fix TODOs" ... This reverts commit 8674a6c68d563908014d16671567459499c6dc99.	2019-10-04 22:31:04 -07:00
Eddie Hung	6d68972619	More comments, cleanup	2019-10-04 22:31:04 -07:00
Eddie Hung	7de9c33931	Fix TODOs	2019-10-04 22:31:04 -07:00
Eddie Hung	983068103e	Consistency	2019-10-04 22:31:04 -07:00
Eddie Hung	cf82b38478	Add comments for xilinx_dsp	2019-10-04 22:31:04 -07:00
Eddie Hung	b47bb5c810	Fix typo in check_label()	2019-10-04 21:43:50 -07:00
Eddie Hung	0acc51c3d8	Add temporary abc9 -nomfs and use for synth_xilinx -abc9	2019-10-04 17:35:43 -07:00
Eddie Hung	9c23811839	Remove DSP48E1 from *_cells_xtra.v	2019-10-04 17:26:42 -07:00
Eddie Hung	74ef8feeaf	Fix xilinx_dsp for unsigned extensions	2019-10-04 16:46:15 -07:00
Eddie Hung	6bf7114bbd	Fix for SigSpec() == SigSpec(State::Sx, 0) to be true again	2019-10-04 16:45:36 -07:00
Eddie Hung	279fd22ddf	Add Const::{begin,end,empty}()	2019-10-04 15:00:57 -07:00
Eddie Hung	9fef1df3c1	Panic over. Model was elsewhere. Re-arrange for consistency	2019-10-04 10:48:44 -07:00
Eddie Hung	4e11782cde	Oops	2019-10-04 10:36:02 -07:00
Eddie Hung	c0f54d3fd5	Ohmilord this wasn't added all this time!?!	2019-10-04 10:34:16 -07:00
Clifford Wolf	2ed2e9c3e8	Change smtbmc "Warmup failed" status to "PREUNSAT" ... Signed-off-by: Clifford Wolf <clifford@clifford.at>	2019-10-03 14:59:07 +02:00
Clifford Wolf	17cb916cc8	Update ABC to git rev 623b5e8 ... Signed-off-by: Clifford Wolf <clifford@clifford.at>	2019-10-03 14:05:21 +02:00
Clifford Wolf	be8efd7c7b	Bump version ... Signed-off-by: Clifford Wolf <clifford@clifford.at>	2019-10-03 12:26:08 +02:00
Clifford Wolf	468b8a5178	Merge pull request #1419 from YosysHQ/eddie/lazy_derive ... module->derive() to be lazy and not touch ast if already derived	2019-10-03 12:06:12 +02:00
Clifford Wolf	0e05424885	Merge pull request #1422 from YosysHQ/eddie/aigmap_select ... Add -select option to aigmap	2019-10-03 11:54:04 +02:00
Clifford Wolf	afdc990595	Merge pull request #1429 from YosysHQ/clifford/checkmapped ... Add "check -mapped"	2019-10-03 11:50:53 +02:00
Clifford Wolf	3e27b2846b	Add "check -allow-tbuf" ... Signed-off-by: Clifford Wolf <clifford@clifford.at>	2019-10-03 11:49:56 +02:00
David Shah	e0a6742935	Merge pull request #1425 from YosysHQ/dave/ecp5_pdp16 ... ecp5: Add support for mapping 36-bit wide PDP BRAMs	2019-10-03 09:53:45 +01:00
Eddie Hung	278533fe59	Merge pull request #1423 from YosysHQ/eddie/techmap_replace_wire ... RFC: techmap to recognise wires named "_TECHMAP_REPLACE_.<suffix>"	2019-10-02 19:40:39 -07:00
Eddie Hung	62c66406ad	log_dump() to support State enum	2019-10-02 17:49:07 -07:00
Eddie Hung	265a655ef9	Also rename cells with _TECHMAP_REPLACE_. prefix, as per @cliffordwolf	2019-10-02 12:43:35 -07:00
Eddie Hung	a4f2f7d23c	Extend test with renaming cells with prefix too	2019-10-02 12:43:18 -07:00
Clifford Wolf	6028f5df1a	Merge pull request #1428 from YosysHQ/clifford/fixbtor ... Fix btor back-end to use "state" instead of "input" for undef init bits	2019-10-02 13:48:09 +02:00
Clifford Wolf	45e4c040d7	Add "check -mapped" ... Signed-off-by: Clifford Wolf <clifford@clifford.at>	2019-10-02 13:35:03 +02:00
Clifford Wolf	a84a2d74c7	Fix btor back-end to use "state" instead of "input" for undef init bits ... Signed-off-by: Clifford Wolf <clifford@clifford.at>	2019-10-02 12:48:04 +02:00
Miodrag Milanović	da347b9f7e	Merge pull request #1426 from YosysHQ/mmicko/fix_environ ... Define environ, fixes #1424	2019-10-01 19:50:37 +02:00
Miodrag Milanovic	c026579c20	Define environ, fixes #1424	2019-10-01 18:45:07 +02:00
David Shah	b424d374db	ecp5: Fix shuffle_enable port ... Signed-off-by: David Shah <dave@ds0.me>	2019-10-01 14:14:46 +01:00
David Shah	7a1538cd36	ecp5: Add support for mapping 36-bit wide PDP BRAMs ... Signed-off-by: David Shah <dave@ds0.me>	2019-10-01 13:46:36 +01:00
Eddie Hung	369652d4b9	Add test	2019-09-30 17:20:39 -07:00
Eddie Hung	edc3780723	techmap wires named _TECHMAP_REPLACE_.<identifier> to create alias	2019-09-30 17:20:12 -07:00
Eddie Hung	8b239ee707	Add quick test	2019-09-30 15:34:04 -07:00
Eddie Hung	f2f19df2d4	Add -select option to aigmap	2019-09-30 15:26:29 -07:00
Eddie Hung	d963e8c2c6	Fix typo	2019-09-30 15:18:40 -07:00
Eddie Hung	0a1af434e8	Fix for svinterfaces	2019-09-30 14:52:04 -07:00
Eddie Hung	08b55a20e3	module->derive() to be lazy and not touch ast if already derived	2019-09-30 14:11:01 -07:00
Eddie Hung	a274b7cc86	Update doc for equiv_opt	2019-09-30 10:59:56 -07:00