AutonamePass rescanned every selected cell/wire from scratch on every
iteration, and naming only propagates one hop per iteration, so cost
scaled with O(iterations x module_size). On a large, fully flattened
netlist with long dependency chains this meant multi-hour runtime and
40+ GB RSS. Likely the same issue as #5394, #4509 and #2816.
Replace the full-rescan loop with a ModuleAutonamer that keeps a
persistent worklist and only recomputes an object's proposal when a
direct neighbor was just renamed, using precomputed adjacency. Same
round-by-round batching as before, so the final naming is unchanged.
Adds tests/various/autoname_scaling.sh, which checks a 10000-cell
propagation chain still autonames within a time budget the old
algorithm could not meet.
This commit reimplements the (no longer recommended) setuptools based
build system using a standards-based in-tree PEP517 build backend.
The implementation is partially based on
https://codeberg.org/ziglang/zig-pypi/src/branch/main/make_wheels.py
which is licensed under BSD-0-clause.
It also adds a new option `YOSYS_BUILD_PYTHON_ONLY` that is available
only if the binary or the library aren't going to be installed, which
turns off these targets entirely, as well as some dependent ones
(e.g. tests).
Co-authored-by: Mohamed Gaber <me@donn.website>
Comes with a set of tests which (currently) pass with `read_verilog` but fail with `verific` based on #5878.
Add `--check-sv`, an alternative to `--prove-sv` with generator defined yosys commands. Helpful for when you want to run the same set of commands on a bunch of sv files.
Previously, setundef would rewrite sigspecs in all cells, processes,
and connections regardless of the active selection. Only modules and
memories were correctly filtered by selection.
Fix by using module->selected_cells() for cells, adding a
module->selected() check for processes, and checking wire selection
on the lhs of each connection before rewriting.
Fixes#5624
I am getting weird crashes on `main` in `tests/sdc/alu_sub.ys` which I traced to a null `Wire*`
in `SdcObjects::constrained_ports`. The null `Wire*` is being set in the `SdcObjects`
constructor. I don't understand what's going on here, so I added this check to detect the
missing wire early ... and that made the crash go away. Compiler bug maybe? I have
`Debian clang version 19.1.7 (3+build5)`, default build configuration.
Anyway this code seems fine to have.
